Hi Rodrigo, On 19 November 2015 at 00:39, Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> wrote: > @@ -441,15 +438,14 @@ void intel_psr_enable(struct intel_dp *intel_dp) > /* > * FIXME: Activation should happen immediately since this function > * is just called after pipe is fully trained and enabled. > - * However on every platform we face issues when first activation > + * However on some platforms we face issues when first activation > * follows a modeset so quickly. > * - On VLV/CHV we get bank screen on first activation > * - On HSW/BDW we get a recoverable frozen screen until next > * exit-activate sequence. > */ > - if (INTEL_INFO(dev)->gen < 9) > - schedule_delayed_work(&dev_priv->psr.work, > - msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5)); > + schedule_delayed_work(&dev_priv->psr.work, > + msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5)); The comment change here seems to be the exact opposite of the code change: aren't we now seeing these issues on every platform? If not, it would be good to elaborate on the issues seen in SKL/BSW. Cheers, Daniel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
