On Wed, Nov 04, 2015 at 11:19:48PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Another round of stuff for the type safe register access. Some of these > were already posted during the first round, but a lot of it is new > (LRI stuff, cmd parser, lrc setup etc., vgpu, etc.) > > Available as a git branch too: > git://github.com/vsyrjala/linux.git type_safe_reg_access_8 > > Ville Syrjälä (29): > pci: Decouple quirks.c from i915_reg.h > drm/i915: Remove the magic AUX_CTL is at DP + foo tricks > drm/i915: Replace the aux ddc name switch statement with a table > drm/i915: Parametrize AUX registers > drm/i915: Add dev_priv->psr_mmio_base > drm/i915: Store aux data reg offsets in intel_dp->aux_ch_data_reg[] > drm/i915: Model PSR AUX register selection more like the normal AUX > code > drm/i915: s/PCH_DP_/PORT_/ in intel_trans_dp_port_sel() and move it > next to its only user > drm/i915: Replace aux_ch_ctl_reg check with port check > drm/i915: s/is_sdvob/enum port/ > drm/i915: Store DVO SRCDIM register offset under intel_dvo_device > drm/i915: Streamline gpio_mmio_base deduction > drm/i915: Prefix raw register defines with underscore > drm/i915: Parametrize L3 error registers > drm/i915: Parametrize MOCS registers > drm/i915: s/0x50/RING_PSMI_CTL/ > drm/i915: Make the high dword offset more explicit in > i915_reg_read_ioctl > drm/i915: Make the cmd parser 64bit regs explicit > drm/i915: Add functions to emit register offsets to the ring > drm/i915: Add wa_ctx_emit_reg() > drm/i915: Wrap ASSIGN_CTX_{PDP,PM4L} in do {} while(0) > drm/i915: Give names to more ring registers > drm/i915: Wrap context LRI init in a macro > drm/i915: Turn vgpu pdps into an array > drm/i915: Pull the vgpu uncore funcs apart from the rest of gen6+ > drm/i915: Add 'offset' to uncore funcs > drm/i915: Add save/restore of SWF for ILK+ > drm/i915: Add missing ')' to SKL_PS_ECC_STAT define > drm/i915: Type safe register read/write Pushed all the remaining patches, except for "drm/i915: Add save/restore of SWF for ILK+" which can be left for future studies/experiments. Thank you for the reviews. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx