On 18 November 2015 at 13:31, Gabriel Feceoru <gabriel.feceoru@xxxxxxxxx> wrote: > > > On 16.11.2015 17:53, Jani Nikula wrote: >> >> On Mon, 16 Nov 2015, Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> >> wrote: >>> >>> When diagnosing a unrelated bug for someone on irc, it would seem the >>> hardware can >>> be brought up by the BIOS with the embedded displayport using the SPLL >>> for spread spectrum. >>> >>> Right now this is not handled well in i915, and it calculates the crtc >>> needs to >>> be reprogrammed on the first modeset without SSC, but the SPLL itself >>> was kept >>> active. Fix this by exposing SPLL as a shared pll that will not be >>> returned >>> by intel_get_shared_dpll; you have to know it exists to use it. >>> >>> Changes since v1: >>> - Create a separate dpll_hw_state.spll for spll, and use >>> separate pll functions for spll. >>> >>> Tested-by: Emil Renner Berthing <kernel@xxxxxxxx> #v1 >>> Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx> >>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> >>> --- >>> Emil, can you retest? >> >> >> Gabriel, you too please! > > > I retested it and it's ok. It works fine for me too. I haven't run the tests yet, but I've run the patch applied to v4.3 the last couple of days. /Emil _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
