On Wed, Nov 04, 2015 at 07:24:16PM +0200, Imre Deak wrote:
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_runtime_pm.c | 66 ++++++++++++++-------------------
> 2 files changed, 29 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c103f8d..e6d88f5 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7491,6 +7491,7 @@ enum skl_disp_power_wells {
>
> /* GEN9 DC */
> #define DC_STATE_EN 0x45504
> +#define DC_STATE_DISABLE 0
> #define DC_STATE_EN_UPTO_DC5 (1<<0)
> #define DC_STATE_EN_DC9 (1<<3)
> #define DC_STATE_EN_UPTO_DC6 (2<<0)
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index b9a0493..f5fb003 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -401,32 +401,43 @@ static void assert_can_disable_dc9(struct drm_i915_private *dev_priv)
> */
> }
>
> +static void gen9_set_dc_state(struct drm_i915_private *dev_priv, uint32_t state)
> +{
> + uint32_t val;
> + uint32_t mask;
> +
> + mask = DC_STATE_EN_UPTO_DC5;
> + if (IS_BROXTON(dev_priv))
> + mask |= DC_STATE_EN_DC9;
> + else
> + mask |= DC_STATE_EN_UPTO_DC6;
> +
> + WARN_ON_ONCE(state & ~mask);
> +
I took the liberty to move gen9_set_dc_state_debugmask_memory_up() here in my
patch series. It'll get called if we try to enable DC5 or DC6 so we only have to
care about it at one place in the code. Perhaps we could even move it to
skl_display_core_init() if we do additional testing on when it needs to be
reset. Either way, not a biggie so let's ignore it for now.
Reviewed-by: Patrik Jakobsson <patrik.jakobsson@xxxxxxxxxxxxxxx>
> + val = I915_READ(DC_STATE_EN);
> + DRM_DEBUG_KMS("Setting DC state from %02x to %02x\n", val & mask, state);
> + val &= ~mask;
> + val |= state;
> + I915_WRITE(DC_STATE_EN, val);
> + POSTING_READ(DC_STATE_EN);
> +}
> +
> void bxt_enable_dc9(struct drm_i915_private *dev_priv)
> {
> - uint32_t val;
> -
> assert_can_enable_dc9(dev_priv);
>
> DRM_DEBUG_KMS("Enabling DC9\n");
>
> - val = I915_READ(DC_STATE_EN);
> - val |= DC_STATE_EN_DC9;
> - I915_WRITE(DC_STATE_EN, val);
> - POSTING_READ(DC_STATE_EN);
> + gen9_set_dc_state(dev_priv, DC_STATE_EN_DC9);
> }
>
> void bxt_disable_dc9(struct drm_i915_private *dev_priv)
> {
> - uint32_t val;
> -
> assert_can_disable_dc9(dev_priv);
>
> DRM_DEBUG_KMS("Disabling DC9\n");
>
> - val = I915_READ(DC_STATE_EN);
> - val &= ~DC_STATE_EN_DC9;
> - I915_WRITE(DC_STATE_EN, val);
> - POSTING_READ(DC_STATE_EN);
> + gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> }
>
> static void gen9_set_dc_state_debugmask_memory_up(
> @@ -487,33 +498,22 @@ static void assert_can_disable_dc5(struct drm_i915_private *dev_priv)
>
> static void gen9_enable_dc5(struct drm_i915_private *dev_priv)
> {
> - uint32_t val;
> -
> assert_can_enable_dc5(dev_priv);
>
> DRM_DEBUG_KMS("Enabling DC5\n");
>
> gen9_set_dc_state_debugmask_memory_up(dev_priv);
>
> - val = I915_READ(DC_STATE_EN);
> - val &= ~DC_STATE_EN_UPTO_DC5_DC6_MASK;
> - val |= DC_STATE_EN_UPTO_DC5;
> - I915_WRITE(DC_STATE_EN, val);
> - POSTING_READ(DC_STATE_EN);
> + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5);
> }
>
> static void gen9_disable_dc5(struct drm_i915_private *dev_priv)
> {
> - uint32_t val;
> -
> assert_can_disable_dc5(dev_priv);
>
> DRM_DEBUG_KMS("Disabling DC5\n");
>
> - val = I915_READ(DC_STATE_EN);
> - val &= ~DC_STATE_EN_UPTO_DC5;
> - I915_WRITE(DC_STATE_EN, val);
> - POSTING_READ(DC_STATE_EN);
> + gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> }
>
> static void assert_can_enable_dc6(struct drm_i915_private *dev_priv)
> @@ -545,33 +545,23 @@ static void assert_can_disable_dc6(struct drm_i915_private *dev_priv)
>
> void skl_enable_dc6(struct drm_i915_private *dev_priv)
> {
> - uint32_t val;
> -
> assert_can_enable_dc6(dev_priv);
>
> DRM_DEBUG_KMS("Enabling DC6\n");
>
> gen9_set_dc_state_debugmask_memory_up(dev_priv);
>
> - val = I915_READ(DC_STATE_EN);
> - val &= ~DC_STATE_EN_UPTO_DC5_DC6_MASK;
> - val |= DC_STATE_EN_UPTO_DC6;
> - I915_WRITE(DC_STATE_EN, val);
> - POSTING_READ(DC_STATE_EN);
> + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);
> +
> }
>
> void skl_disable_dc6(struct drm_i915_private *dev_priv)
> {
> - uint32_t val;
> -
> assert_can_disable_dc6(dev_priv);
>
> DRM_DEBUG_KMS("Disabling DC6\n");
>
> - val = I915_READ(DC_STATE_EN);
> - val &= ~DC_STATE_EN_UPTO_DC6;
> - I915_WRITE(DC_STATE_EN, val);
> - POSTING_READ(DC_STATE_EN);
> + gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> }
>
> static void skl_set_power_well(struct drm_i915_private *dev_priv,
> --
> 2.1.4
>
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