On Fri, Nov 06, 2015 at 01:25:19PM +0000, Chris Wilson wrote: > On Wed, Nov 04, 2015 at 11:19:52PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > v2: Keep some MISSING_CASE() stuff (Jani) > > s/-1/-PIPE_B/ in the register macro > > Fix typo in patch subject > > v3: Use PORT_B registers for invalid ports in g4x_aux_ctl_reg() (Jani) > > > > Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > --- > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > > index 62fb95c..2638a60 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -751,7 +751,7 @@ static uint32_t i9xx_get_aux_send_ctl(struct intel_dp *intel_dp, > > else > > precharge = 5; > > > > - if (IS_BROADWELL(dev) && intel_dp->aux_ch_ctl_reg == DPA_AUX_CH_CTL) > > + if (IS_BROADWELL(dev) && intel_dp->aux_ch_ctl_reg == DP_AUX_CH_CTL(PORT_A)) > > Didn't this change to intel_dp->port == PORT_A at some point? Would that > be worth doing earlier? Hmm. Yeah reordering would reduce the churn a bit. I'll do that. I did reorder the patches after I had written them to group things a bit better, but clearly I could have picked an even better order. > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > -Chris > > -- > Chris Wilson, Intel Open Source Technology Centre -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
