On Wed, Nov 04, 2015 at 11:20:13PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > I need to add a new variable into GEN6_{READ,WRITE}_HEADER, but the vgpu > won't need it, so let's avoid an unused variable warning by splitting > the vgpu stuff to use its own macros. > > Cc: Eddie Dong <eddie.dong@xxxxxxxxx> > Cc: Jike Song <jike.song@xxxxxxxxx> > Cc: Kevin Tian <kevin.tian@xxxxxxxxx> > Cc: Yu Zhang <yu.c.zhang@xxxxxxxxxxxxxxx> > Cc: Zhi Wang <zhi.a.wang@xxxxxxxxx> > Cc: Zhiyuan Lv <zhiyuan.lv@xxxxxxxxx> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> It looks good to me. Thanks! Reviewed-by: Zhiyuan Lv <zhiyuan.lv@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_uncore.c | 80 +++++++++++++++++++++++++------------ > 1 file changed, 54 insertions(+), 26 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index ced494a..52ba23d 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -701,14 +701,6 @@ static inline void __force_wake_get(struct drm_i915_private *dev_priv, > dev_priv->uncore.funcs.force_wake_get(dev_priv, fw_domains); > } > > -#define __vgpu_read(x) \ > -static u##x \ > -vgpu_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \ > - GEN6_READ_HEADER(x); \ > - val = __raw_i915_read##x(dev_priv, reg); \ > - GEN6_READ_FOOTER; \ > -} > - > #define __gen6_read(x) \ > static u##x \ > gen6_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \ > @@ -783,10 +775,6 @@ gen9_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \ > GEN6_READ_FOOTER; \ > } > > -__vgpu_read(8) > -__vgpu_read(16) > -__vgpu_read(32) > -__vgpu_read(64) > __gen9_read(8) > __gen9_read(16) > __gen9_read(32) > @@ -808,10 +796,37 @@ __gen6_read(64) > #undef __chv_read > #undef __vlv_read > #undef __gen6_read > -#undef __vgpu_read > #undef GEN6_READ_FOOTER > #undef GEN6_READ_HEADER > > +#define VGPU_READ_HEADER(x) \ > + unsigned long irqflags; \ > + u##x val = 0; \ > + assert_device_not_suspended(dev_priv); \ > + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags) > + > +#define VGPU_READ_FOOTER \ > + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \ > + trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \ > + return val > + > +#define __vgpu_read(x) \ > +static u##x \ > +vgpu_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \ > + VGPU_READ_HEADER(x); \ > + val = __raw_i915_read##x(dev_priv, reg); \ > + VGPU_READ_FOOTER; \ > +} > + > +__vgpu_read(8) > +__vgpu_read(16) > +__vgpu_read(32) > +__vgpu_read(64) > + > +#undef __vgpu_read > +#undef VGPU_READ_FOOTER > +#undef VGPU_READ_HEADER > + > #define GEN2_WRITE_HEADER \ > trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \ > assert_device_not_suspended(dev_priv); \ > @@ -892,14 +907,6 @@ hsw_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) > GEN6_WRITE_FOOTER; \ > } > > -#define __vgpu_write(x) \ > -static void vgpu_write##x(struct drm_i915_private *dev_priv, \ > - off_t reg, u##x val, bool trace) { \ > - GEN6_WRITE_HEADER; \ > - __raw_i915_write##x(dev_priv, reg, val); \ > - GEN6_WRITE_FOOTER; \ > -} > - > static const u32 gen8_shadowed_regs[] = { > FORCEWAKE_MT, > GEN6_RPNSWREQ, > @@ -1023,20 +1030,41 @@ __gen6_write(8) > __gen6_write(16) > __gen6_write(32) > __gen6_write(64) > -__vgpu_write(8) > -__vgpu_write(16) > -__vgpu_write(32) > -__vgpu_write(64) > > #undef __gen9_write > #undef __chv_write > #undef __gen8_write > #undef __hsw_write > #undef __gen6_write > -#undef __vgpu_write > #undef GEN6_WRITE_FOOTER > #undef GEN6_WRITE_HEADER > > +#define VGPU_WRITE_HEADER \ > + unsigned long irqflags; \ > + trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \ > + assert_device_not_suspended(dev_priv); \ > + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags) > + > +#define VGPU_WRITE_FOOTER \ > + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags) > + > +#define __vgpu_write(x) \ > +static void vgpu_write##x(struct drm_i915_private *dev_priv, \ > + off_t reg, u##x val, bool trace) { \ > + VGPU_WRITE_HEADER; \ > + __raw_i915_write##x(dev_priv, reg, val); \ > + VGPU_WRITE_FOOTER; \ > +} > + > +__vgpu_write(8) > +__vgpu_write(16) > +__vgpu_write(32) > +__vgpu_write(64) > + > +#undef __vgpu_write > +#undef VGPU_WRITE_FOOTER > +#undef VGPU_WRITE_HEADER > + > #define ASSIGN_WRITE_MMIO_VFUNCS(x) \ > do { \ > dev_priv->uncore.funcs.mmio_writeb = x##_write8; \ > -- > 2.4.10 > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx