Yeah, very likely. I wonder, how easy is to negotiate issue with inter-ring synchronization on BDW in the expectation of KMD Scheduler from John Harrison? -----Original Message----- From: Chris Wilson [mailto:chris@xxxxxxxxxxxxxxxxxx] Sent: Monday, November 2, 2015 12:53 PM To: Gong, Zhipeng Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; Rogozhkin, Dmitry V Subject: Re: [PATCH] RFC drm/i915: Slaughter the thundering i915_wait_request herd On Mon, Nov 02, 2015 at 05:39:54AM +0000, Gong, Zhipeng wrote: > Chris- > > The patch cannot be applied on the latest drm-intel-nightly directly. > I modified it a little bit to make it applied. > The patch can help much in HSW, but a little bit in BDW. > The test is to transcode 26 streams, which creates 244 threads. > > CPU util | w/o patch | w/ patch > ---------------------------------------------------------- > HSW async 1 | 102% | 61% > HSW async 5 | 114% | 46% > BDW async 1 | 116% | 116% > BDW async 5 | 111% | 107% The problem on bdw is likely to be frequent inter-ring synchronisation keeping the number of waiters at 1 (i.e. lack of semaphores). Note that the first waiter gets the busywait before waiting on the interrupt. -Chris -- Chris Wilson, Intel Open Source Technology Centre -------------------------------------------------------------------- Joint Stock Company Intel A/O Registered legal address: Krylatsky Hills Business Park, 17 Krylatskaya Str., Bldg 4, Moscow 121614, Russian Federation This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
