Re: [PATCH] drm/i915/kbl: Fix DMC load on Kabylake.

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Hi Rodrigo,

[auto build test WARNING on drm-intel/for-linux-next -- if it's inappropriate base, please suggest rules for selecting the more suitable base]

url:    https://github.com/0day-ci/linux/commits/Rodrigo-Vivi/drm-i915-kbl-Fix-DMC-load-on-Kabylake/20151030-012303
config: x86_64-randconfig-x001-10252017 (attached as .config)
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All warnings (new ones prefixed by >>):

   In file included from include/uapi/linux/stddef.h:1:0,
                    from include/linux/stddef.h:4,
                    from include/uapi/linux/posix_types.h:4,
                    from include/uapi/linux/types.h:13,
                    from include/linux/types.h:5,
                    from include/linux/firmware.h:4,
                    from drivers/gpu/drm/i915/intel_csr.c:24:
   drivers/gpu/drm/i915/intel_csr.c: In function 'intel_get_stepping':
   drivers/gpu/drm/i915/intel_csr.c:202:6: error: implicit declaration of function 'IS_KABYLAKE' [-Werror=implicit-function-declaration]
     if (IS_KABYLAKE(dev) && revid == 0)
         ^
   include/linux/compiler.h:147:28: note: in definition of macro '__trace_if'
     if (__builtin_constant_p((cond)) ? !!(cond) :   \
                               ^
>> drivers/gpu/drm/i915/intel_csr.c:202:2: note: in expansion of macro 'if'
     if (IS_KABYLAKE(dev) && revid == 0)
     ^
   cc1: some warnings being treated as errors

vim +/if +202 drivers/gpu/drm/i915/intel_csr.c

    18	 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
    19	 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
    20	 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
    21	 * IN THE SOFTWARE.
    22	 *
    23	 */
  > 24	#include <linux/firmware.h>
    25	#include "i915_drv.h"
    26	#include "i915_reg.h"
    27	
    28	/**
    29	 * DOC: csr support for dmc
    30	 *
    31	 * Display Context Save and Restore (CSR) firmware support added from gen9
    32	 * onwards to drive newly added DMC (Display microcontroller) in display
    33	 * engine to save and restore the state of display engine when it enter into
    34	 * low-power state and comes back to normal.
    35	 *
    36	 * Firmware loading status will be one of the below states: FW_UNINITIALIZED,
    37	 * FW_LOADED, FW_FAILED.
    38	 *
    39	 * Once the firmware is written into the registers status will be moved from
    40	 * FW_UNINITIALIZED to FW_LOADED and for any erroneous condition status will
    41	 * be moved to FW_FAILED.
    42	 */
    43	
    44	#define I915_CSR_SKL "i915/skl_dmc_ver1.bin"
    45	#define I915_CSR_BXT "i915/bxt_dmc_ver1.bin"
    46	
    47	MODULE_FIRMWARE(I915_CSR_SKL);
    48	MODULE_FIRMWARE(I915_CSR_BXT);
    49	
    50	/*
    51	* SKL CSR registers for DC5 and DC6
    52	*/
    53	#define CSR_PROGRAM(i)			(0x80000 + (i) * 4)
    54	#define CSR_SSP_BASE_ADDR_GEN9		0x00002FC0
    55	#define CSR_HTP_ADDR_SKL		0x00500034
    56	#define CSR_SSP_BASE			0x8F074
    57	#define CSR_HTP_SKL			0x8F004
    58	#define CSR_LAST_WRITE			0x8F034
    59	#define CSR_LAST_WRITE_VALUE		0xc003b400
    60	/* MMIO address range for CSR program (0x80000 - 0x82FFF) */
    61	#define CSR_MAX_FW_SIZE			0x2FFF
    62	#define CSR_DEFAULT_FW_OFFSET		0xFFFFFFFF
    63	#define CSR_MMIO_START_RANGE	0x80000
    64	#define CSR_MMIO_END_RANGE		0x8FFFF
    65	
    66	struct intel_css_header {
    67		/* 0x09 for DMC */
    68		uint32_t module_type;
    69	
    70		/* Includes the DMC specific header in dwords */
    71		uint32_t header_len;
    72	
    73		/* always value would be 0x10000 */
    74		uint32_t header_ver;
    75	
    76		/* Not used */
    77		uint32_t module_id;
    78	
    79		/* Not used */
    80		uint32_t module_vendor;
    81	
    82		/* in YYYYMMDD format */
    83		uint32_t date;
    84	
    85		/* Size in dwords (CSS_Headerlen + PackageHeaderLen + dmc FWsLen)/4 */
    86		uint32_t size;
    87	
    88		/* Not used */
    89		uint32_t key_size;
    90	
    91		/* Not used */
    92		uint32_t modulus_size;
    93	
    94		/* Not used */
    95		uint32_t exponent_size;
    96	
    97		/* Not used */
    98		uint32_t reserved1[12];
    99	
   100		/* Major Minor */
   101		uint32_t version;
   102	
   103		/* Not used */
   104		uint32_t reserved2[8];
   105	
   106		/* Not used */
   107		uint32_t kernel_header_info;
   108	} __packed;
   109	
   110	struct intel_fw_info {
   111		uint16_t reserved1;
   112	
   113		/* Stepping (A, B, C, ..., *). * is a wildcard */
   114		char stepping;
   115	
   116		/* Sub-stepping (0, 1, ..., *). * is a wildcard */
   117		char substepping;
   118	
   119		uint32_t offset;
   120		uint32_t reserved2;
   121	} __packed;
   122	
   123	struct intel_package_header {
   124		/* DMC container header length in dwords */
   125		unsigned char header_len;
   126	
   127		/* always value would be 0x01 */
   128		unsigned char header_ver;
   129	
   130		unsigned char reserved[10];
   131	
   132		/* Number of valid entries in the FWInfo array below */
   133		uint32_t num_entries;
   134	
   135		struct intel_fw_info fw_info[20];
   136	} __packed;
   137	
   138	struct intel_dmc_header {
   139		/* always value would be 0x40403E3E */
   140		uint32_t signature;
   141	
   142		/* DMC binary header length */
   143		unsigned char header_len;
   144	
   145		/* 0x01 */
   146		unsigned char header_ver;
   147	
   148		/* Reserved */
   149		uint16_t dmcc_ver;
   150	
   151		/* Major, Minor */
   152		uint32_t	project;
   153	
   154		/* Firmware program size (excluding header) in dwords */
   155		uint32_t	fw_size;
   156	
   157		/* Major Minor version */
   158		uint32_t fw_version;
   159	
   160		/* Number of valid MMIO cycles present. */
   161		uint32_t mmio_count;
   162	
   163		/* MMIO address */
   164		uint32_t mmioaddr[8];
   165	
   166		/* MMIO data */
   167		uint32_t mmiodata[8];
   168	
   169		/* FW filename  */
   170		unsigned char dfile[32];
   171	
   172		uint32_t reserved1[2];
   173	} __packed;
   174	
   175	struct stepping_info {
   176		char stepping;
   177		char substepping;
   178	};
   179	
   180	static const struct stepping_info skl_stepping_info[] = {
   181			{'A', '0'}, {'B', '0'}, {'C', '0'},
   182			{'D', '0'}, {'E', '0'}, {'F', '0'},
   183			{'G', '0'}, {'H', '0'}, {'I', '0'}
   184	};
   185	
   186	static struct stepping_info bxt_stepping_info[] = {
   187		{'A', '0'}, {'A', '1'}, {'A', '2'},
   188		{'B', '0'}, {'B', '1'}, {'B', '2'}
   189	};
   190	
   191	static char intel_get_stepping(struct drm_device *dev)
   192	{
   193		int revid = INTEL_REVID(dev);
   194	
   195		/*
   196		 * FIXME: Kabylake derivated from Skylake H0, so SKL H0
   197		 * is the right firmware for KBL A0 (revid 0).
   198		 * We have no visibility yet how next KBL steppings will
   199		 * be handled by firmware, so let's just add support for
   200		 * the only current available KBL.
   201		 */
 > 202		if (IS_KABYLAKE(dev) && revid == 0)
   203			return skl_stepping_info[7].stepping;
   204	
   205		if (IS_SKYLAKE(dev) &&

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

Attachment: .config.gz
Description: Binary data

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