Em Ter, 2015-10-27 às 19:50 +0000, Chris Wilson escreveu: > On Tue, Oct 27, 2015 at 02:50:04PM -0200, Paulo Zanoni wrote: > > @@ -1021,13 +1078,48 @@ void intel_fbc_flush(struct > > drm_i915_private *dev_priv, > > if (origin == ORIGIN_GTT) > > return; > > > > + /* Hardware tracking already recompresses the CFB (nuke) > > for us if FBC > > + * is enabled and we do a page flip, so we can safely > > ignore it here. > > + * FBC may be disabled in case we got an invalidate() > > before the > > + * flush(), so we'll still have to check that case below. > > */ > > I feel like I understand what is going on a bit better now, thanks! > > > + if (origin == ORIGIN_FLIP && dev_priv->fbc.enabled) > > + return; > > + > > mutex_lock(&dev_priv->fbc.lock); > > > > dev_priv->fbc.busy_bits &= ~frontbuffer_bits; > > > > if (!dev_priv->fbc.busy_bits) { > > - __intel_fbc_disable(dev_priv); > > - __intel_fbc_update(dev_priv); > > + if (origin == ORIGIN_FLIP) { > > Note this test here is redundant. > > We know that for an origin == FLIP to be here, FBC is disabled and > calling intel_fbc_disable() is then a no-op. > > So it turns out that the origin two lines of disable(); update() > works > just as well. Or is there some later patch that tweaks this branch > further? Right, you commented about this on the patch that is currently 04/26 an I only fixed it there. > -Chris > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx