On Fri, 23 Oct 2015, Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote: > On Fri, Oct 23, 2015 at 10:56:12AM +0200, Daniel Vetter wrote: >> We get tons of cases where the master interrupt handler apparently set >> a bit, with the SDEIIR agreeing. No idea what's going on there, but >> it's consistent on gen8+, no one seems to care about it and it's >> making CI results flaky. > > Just delete the message and delete them all. There isn't anything we can > do and if anybody actually cared (which apparently they didn't in the > first place), they could just trace the mmio. Except this one is a regression, introduced by a bisected commit, and suspiciously the errors pop up during aux transfers. https://bugs.freedesktop.org/show_bug.cgi?id=92084 BR, Jani. -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
