On Thu, Oct 22, 2015 at 04:32:03PM +0300, Mika Kuoppala wrote:
> We have had one case where buggy csr/dmc firmware version influenced
> gt side and caused a hang. Add dmc firmware loading state and
> version to error state.
>
> v2: - Rebased on top of Damien's patches
> - included fw load state
> v3: include dmc info only if platform supports it
>
> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_gpu_error.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 2f04e4f..0735f40 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -335,6 +335,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
> struct drm_device *dev = error_priv->dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct drm_i915_error_state *error = error_priv->error;
> + struct intel_csr *csr = &dev_priv->csr;
> struct drm_i915_error_object *obj;
> int i, j, offset, elt;
> int max_hangcheck_score;
> @@ -366,6 +367,12 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
> err_printf(m, "Suspend count: %u\n", error->suspend_count);
> err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
> err_printf(m, "IOMMU enabled?: %d\n", error->iommu);
> + if (HAS_CSR(dev)) {
if (HAS_CSR(dev_priv)) {
struct intel_csr *csr = &dev_priv->csr;
> + err_printf(m, "DMC load state: %d\n", csr->state);
> + err_printf(m, "DMC fw version: %d.%d\n",
> + CSR_VERSION_MAJOR(csr->version),
> + CSR_VERSION_MINOR(csr->version));
> + }
and with that
Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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