fb_bits is useful to have in the crtc_state for cs flips later on,
so keep it alive there. The other stuff can be calculated in
post_plane_update, and aren't useful elsewhere.
Currently there's a loop in post_plane_update, this should disappear
with the changes to atomic wm's. At that point only updates to the
primary plane are important.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/intel_atomic.c | 1 +
drivers/gpu/drm/i915/intel_display.c | 54 ++++++++++++++++++++++++------------
drivers/gpu/drm/i915/intel_drv.h | 4 +--
3 files changed, 38 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c
index 9d69cf25d7c5..05456d90d6c7 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -96,6 +96,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
crtc_state->update_pipe = false;
crtc_state->visible_changed = false;
crtc_state->wm_changed = false;
+ crtc_state->fb_bits = 0;
return &crtc_state->base;
}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 317ff405aca9..1cd79d9b3da1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4745,16 +4745,20 @@ intel_pre_disable_primary(struct drm_crtc *crtc)
hsw_disable_ips(intel_crtc);
}
-static void intel_post_plane_update(struct intel_crtc *crtc)
+static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
+ struct drm_atomic_state *old_state = old_crtc_state->base.state;
struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc->base.state);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_plane_state *old_plane_state;
struct drm_plane *plane;
+ int i;
- intel_frontbuffer_flip(dev, atomic->fb_bits);
+ intel_frontbuffer_flip(dev, pipe_config->fb_bits);
crtc->wm.cxsr_allowed = true;
@@ -4764,12 +4768,34 @@ static void intel_post_plane_update(struct intel_crtc *crtc)
if (atomic->update_fbc)
intel_fbc_update(dev_priv);
- if (atomic->post_enable_primary)
- intel_post_enable_primary(&crtc->base);
+ for_each_plane_in_state(old_state, plane, old_plane_state, i) {
+ struct intel_plane_state *plane_state =
+ to_intel_plane_state(plane->state);
+
+ if (old_plane_state->crtc != &crtc->base &&
+ plane_state->base.crtc != &crtc->base)
+ continue;
+
+ switch (plane->type) {
+ case DRM_PLANE_TYPE_PRIMARY:
+ if (plane_state->visible &&
+ (needs_modeset(&pipe_config->base) ||
+ !to_intel_plane_state(old_plane_state)->visible))
+ intel_post_enable_primary(&crtc->base);
+ break;
+
+ case DRM_PLANE_TYPE_CURSOR:
+ break;
- drm_for_each_plane_mask(plane, dev, atomic->update_sprite_watermarks)
- intel_update_sprite_watermarks(plane, &crtc->base,
- 0, 0, 0, false, false);
+ case DRM_PLANE_TYPE_OVERLAY:
+ if (to_intel_plane_state(old_plane_state)->visible &&
+ !needs_modeset(&pipe_config->base) &&
+ !plane_state->visible)
+ intel_update_sprite_watermarks(plane, &crtc->base,
+ 0, 0, 0, false, false);
+ break;
+ }
+ }
memset(atomic, 0, sizeof(*atomic));
}
@@ -11623,7 +11649,6 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
struct intel_plane_state *old_plane_state =
to_intel_plane_state(plane->state);
int idx = intel_crtc->base.base.id, ret;
- int i = drm_plane_index(plane);
bool mode_changed = needs_modeset(crtc_state);
bool was_crtc_enabled = crtc->state->active;
bool is_crtc_enabled = crtc_state->active;
@@ -11674,13 +11699,10 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
turn_off, turn_on, mode_changed);
if (visible || was_visible)
- intel_crtc->atomic.fb_bits |=
- to_intel_plane(plane)->frontbuffer_bit;
+ pipe_config->fb_bits |= to_intel_plane(plane)->frontbuffer_bit;
switch (plane->type) {
case DRM_PLANE_TYPE_PRIMARY:
- intel_crtc->atomic.post_enable_primary = turn_on;
-
if (turn_off)
intel_crtc->atomic.disable_fbc = true;
@@ -11704,12 +11726,8 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
intel_crtc->atomic.update_fbc |= visible || mode_changed;
break;
case DRM_PLANE_TYPE_CURSOR:
- break;
case DRM_PLANE_TYPE_OVERLAY:
- if (turn_off && !mode_changed) {
- intel_crtc->atomic.update_sprite_watermarks |=
- 1 << i;
- }
+ break;
}
return 0;
}
@@ -13253,7 +13271,7 @@ static int intel_atomic_commit(struct drm_device *dev,
drm_atomic_helper_wait_for_vblanks(dev, state);
for_each_crtc_in_state(state, crtc, crtc_state, i)
- intel_post_plane_update(to_intel_crtc(crtc));
+ intel_post_plane_update(to_intel_crtc_state(crtc_state));
mutex_lock(&dev->struct_mutex);
drm_atomic_helper_cleanup_planes(dev, state);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e9e485336c90..75cfd8c7b981 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -352,6 +352,7 @@ struct intel_crtc_state {
#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */
unsigned long quirks;
+ unsigned fb_bits; /* framebuffers to flip */
bool update_pipe; /* can a fast modeset be performed? */
bool visible_changed; /* plane visibility changed */
bool wm_changed; /* wm changed */
@@ -519,10 +520,7 @@ struct intel_crtc_atomic_commit {
bool disable_fbc;
/* Sleepable operations to perform after commit */
- unsigned fb_bits;
bool update_fbc;
- bool post_enable_primary;
- unsigned update_sprite_watermarks;
};
struct intel_crtc {
--
2.1.0
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