On Wed, Oct 21, 2015 at 06:41:52PM +0300, Mika Kuoppala wrote: > We check these to determine firmware loading status. Include > them to help to debug causes of firmware loading fails. > > Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 4 ++++ > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > 2 files changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 5d606f0..e54f1bf 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2795,6 +2795,10 @@ static int i915_dmc_info(struct seq_file *m, void *unused) > > csr_state = intel_csr_load_status_get(dev_priv); > seq_printf(m, "status: %s\n", csr_state_str[csr_state]); > + seq_printf(m, "path: %s\n", csr->fw_path); > + seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0))); > + seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE)); > + seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL)); > > if (csr_state != FW_LOADED) > return 0; > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 05f4a18..9966bfd 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5697,6 +5697,9 @@ enum skl_disp_power_wells { > #define GAMMA_MODE_MODE_SPLIT (3 << 0) > > /* DMC/CSR */ > +#define CSR_PROGRAM(i) (0x80000 + (i) * 4) > +#define CSR_SSP_BASE 0x8F074 > +#define CSR_HTP_SKL 0x8F004 Can you just move all of it from intel_csr.c to here? > #define SKL_CSR_DC3_DC5_COUNT 0x80030 > #define SKL_CSR_DC5_DC6_COUNT 0x8002C > #define BXT_CSR_DC3_DC5_COUNT 0x80038 > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx