On Wed, Oct 14, 2015 at 07:28:58PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Make intel_gen4_compute_page_offset() ready for other tiling formats
> besied X-tile by getting the tile dimensions through
> intel_tile_{size,width,height}().
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 15 ++++++++++-----
> 1 file changed, 10 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c8b2907..509fcac 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2460,15 +2460,20 @@ unsigned long intel_gen4_compute_page_offset(struct drm_i915_private *dev_priv,
> unsigned int pitch)
> {
For consistency I'd rename it to compute_tile_offset then. Since it might
or might not be a page any more. Can be done in a follow-up. And that
tile_offset helper would be pretty in i915_gem_tiling.c too I'd say.
Anyway Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> if (fb_modifier != DRM_FORMAT_MOD_NONE) {
> + unsigned int tile_size, tile_width, tile_height;
> unsigned int tile_rows, tiles;
>
> - tile_rows = *y / 8;
> - *y %= 8;
> + tile_size = intel_tile_size(dev_priv);
> + tile_width = intel_tile_width(dev_priv, fb_modifier, cpp);
> + tile_height = tile_size / tile_width;
> +
> + tile_rows = *y / tile_height;
> + *y %= tile_height;
>
> - tiles = *x / (512/cpp);
> - *x %= 512/cpp;
> + tiles = *x / (tile_width/cpp);
> + *x %= tile_width/cpp;
>
> - return tile_rows * pitch * 8 + tiles * 4096;
> + return tile_rows * pitch * tile_height + tiles * tile_size;
> } else {
> unsigned int alignment = intel_linear_alignment(dev_priv) - 1;
> unsigned int offset;
> --
> 2.4.9
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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