On Mon, Oct 12, 2015 at 01:20:59PM +0300, Mika Kuoppala wrote: > Some registers are, naturally, lost in gpu reset/suspend cycle. > And some registers, for example in display domain, are not subject > to gpu reset so they retain their contents. > > As hang recovery triggers a reset, recoverable gpu hang can currently > flush out essential workarounds and cause havoc later on. > > When register GEN8_GARBNTL is missing the WaEnableGapsTsvCreditFix:skl, > it can cause random system hangs [1]. This workaround was added in: > commit 245d96670d26 ("drm/i915:skl: Add WaEnableGapsTsvCreditFix") > But another set of system hangs were observed and the failure pattern > indicated that there was random gpu hang preceding the system hang [2]. > This lead to the realization that we lose this workaround and BDW_SCRATCH1 > on reset. > > Add these workarounds setup in display init to skl/bxt ring init > where LRI workarounds are also setup. This way their setup is not > dependent on display side init. > > References: [1] https://bugs.freedesktop.org/show_bug.cgi?id=90854 > References: [2] https://bugs.freedesktop.org/show_bug.cgi?id=92315 > Reported-by: Tomi Sarvela <tomix.p.sarvela@xxxxxxxxx> > Cc: Tomi Sarvela <tomix.p.sarvela@xxxxxxxxx> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> I had forgotten we had begun splitting out the GT registers from the display registers for init_hw. These movements make sense so, Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx