[PATCH 06/12] drm/i915: Introduce mmio workaround list

[Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>]

Introduce another workaround list for mmio write type of
workarounds. No users yet.

Cc: Arun Siluvery <arun.siluvery@xxxxxxxxxxxxxxx>
Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 14 +++++++++-----
 drivers/gpu/drm/i915/i915_drv.h     | 14 ++++++++++----
 2 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index af44808..0c4e6bc 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3095,7 +3095,8 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused)
 }
 
 static void print_wa_regs(struct seq_file *m,
-			  const struct i915_workarounds *w)
+			  const struct i915_workarounds *w,
+			  const char *type)
 {
 	struct drm_info_node *node = (struct drm_info_node *) m->private;
 	struct drm_device *dev = node->minor->dev;
@@ -3111,8 +3112,8 @@ static void print_wa_regs(struct seq_file *m,
 		value = w->reg[i].value;
 		read = I915_READ(addr);
 		ok = (value & mask) == (read & mask);
-		seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X, read: 0x%08x, status: %s\n",
-			   addr, value, mask, read, ok ? "OK" : "FAIL");
+		seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X, read: 0x%08x, type: %s, status: %s\n",
+			   addr, value, mask, read, type, ok ? "OK" : "FAIL");
 	}
 }
 
@@ -3130,8 +3131,11 @@ static int i915_wa_registers(struct seq_file *m, void *unused)
 	intel_runtime_pm_get(dev_priv);
 
 	seq_printf(m, "Workarounds applied: %d\n",
-		   dev_priv->lri_workarounds.count);
-	print_wa_regs(m, &dev_priv->lri_workarounds);
+		   dev_priv->lri_workarounds.count +
+		   dev_priv->mmio_workarounds.count);
+
+	print_wa_regs(m, &dev_priv->lri_workarounds,  " LRI");
+	print_wa_regs(m, &dev_priv->mmio_workarounds, "MMIO");
 
 	intel_runtime_pm_put(dev_priv);
 	mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0ed790c..ae5b6b3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1845,6 +1845,7 @@ struct drm_i915_private {
 	int dpio_phy_iosf_port[I915_NUM_PHYS_VLV];
 
 	struct i915_workarounds lri_workarounds;
+	struct i915_workarounds mmio_workarounds;
 
 	/* Reclocking support */
 	bool render_reclock_avail;
@@ -3519,12 +3520,17 @@ static inline void i915_trace_irq_get(struct intel_engine_cs *ring,
 }
 
 /* Workaround register lists */
-#define WA_REG_LRI(addr, mask, val) do { \
-		const int r = intel_wa_add(&dev_priv->lri_workarounds, \
-					   (addr), (mask), (val)); \
-		WARN_ON(r); \
+#define WA_REG(wlist, addr, mask, val) do { \
+	const int r = intel_wa_add((wlist), (addr), (mask), (val)); \
+	WARN_ON(r); \
 	} while (0)
 
+#define WA_REG_LRI(addr, mask, val) \
+	WA_REG(&dev_priv->lri_workarounds, (addr), (mask), (val))
+
+#define WA_REG_MMIO(addr, mask, val) \
+	WA_REG(&dev_priv->mmio_workarounds, (addr), (mask), (val))
+
 #define WA_SET_BIT_MASKED(t, addr, mask) \
 	WA_REG_##t(addr, (mask), _MASKED_BIT_ENABLE(mask))
 
-- 
2.1.4

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