On Tue, Sep 29, 2015 at 3:23 PM, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > Hmm. Why are we going back and forth on this all the time? Was there > some problem with the plan [1] that Imre and I hatched? > > [1] http://lists.freedesktop.org/archives/intel-gfx/2015-September/076612.html Well this is just the interim bugfix with a confusing commit message. Compared to your overall plan we now have dc5&pw2 fused together, pw1 is still there but a no-op and dc6 is now (with this patch) fused with with pw0 and overall device d3 (or whatever we use to kill the entire thing and still appease the firmware). So at least matches the overall plan. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
