On Tue, Aug 04, 2015 at 10:02:42PM +0530, Animesh Manna wrote:
> Modified HAS_CSR macro defination which earlier only supported
> for skl, now added support for BXT.
>
> v1: Initial version.
>
> v2: Instaed of skylake/broxton check added gen9 check alone based
> on review comment from Sunil.
>
> Cc: Vetter, Daniel <daniel.vetter@xxxxxxxxx>
> Cc: Damien Lespiau <damien.lespiau@xxxxxxxxx>
> Cc: Imre Deak <imre.deak@xxxxxxxxx>
> Cc: Sunil Kamath <sunil.kamath@xxxxxxxxx>
> Signed-off-by: Animesh Manna <animesh.manna@xxxxxxxxx>
The feature-enabling patch should always be last, to avoid breaking
machines in the middle of your patch series. I've reordered them while
applying the entire patch series.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 773883d..c9a887f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2533,7 +2533,7 @@ struct drm_i915_cmd_table {
> #define HAS_RC6(dev) (INTEL_INFO(dev)->gen >= 6)
> #define HAS_RC6p(dev) (INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev))
>
> -#define HAS_CSR(dev) (IS_SKYLAKE(dev))
> +#define HAS_CSR(dev) (IS_GEN9(dev))
>
> #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
> INTEL_INFO(dev)->gen >= 8)
> --
> 2.0.2
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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