On pe, 2015-09-18 at 23:39 +0530, Sagar Arun Kamble wrote: > From: Akash Goel <akash.goel@xxxxxxxxx> > > Signed-off-by: Ankitprasad Sharma <ankitprasad.r.sharma@xxxxxxxxx> > Signed-off-by: Akash Goel <akash.goel@xxxxxxxxx> > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_reg.h | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 67bf205..6b1998c 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -2802,8 +2802,11 @@ enum skl_disp_power_wells { > > #define INTERVAL_1_28_US(us) (((us) * 100) >> 7) > #define INTERVAL_1_33_US(us) (((us) * 3) >> 2) > +#define INTERVAL_0_833_US(us) (((us) * 6) / 5) > #define GT_INTERVAL_FROM_US(dev_priv, us) (IS_GEN9(dev_priv) ? \ > - INTERVAL_1_33_US(us) : \ > + (IS_BROXTON(dev_priv) ? \ > + INTERVAL_0_833_US(us) : \ > + INTERVAL_1_33_US(us)) : \ > INTERVAL_1_28_US(us)) Note that neither of the GEN9 values are mentioned in Bspec, so a request for update should be filed there. I haven't found any other place that would document this either, could you point me to it? --Imre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx