From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/i915_reg.h | 8 +++++++-
drivers/gpu/drm/i915/intel_display.c | 27 ++++++++++++---------------
2 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a8fb5f7..ddfcd68 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3262,7 +3262,9 @@ enum skl_disp_power_wells {
#define GEN3_SDVOC 0x61160
#define GEN4_HDMIB GEN3_SDVOB
#define GEN4_HDMIC GEN3_SDVOC
-#define CHV_HDMID 0x6116C
+#define VLV_HDMIB (VLV_DISPLAY_BASE + GEN4_HDMIB)
+#define VLV_HDMIC (VLV_DISPLAY_BASE + GEN4_HDMIC)
+#define CHV_HDMID (VLV_DISPLAY_BASE + 0x6116C)
#define PCH_SDVOB 0xe1140
#define PCH_HDMIB PCH_SDVOB
#define PCH_HDMIC 0xe1150
@@ -4091,6 +4093,10 @@ enum skl_disp_power_wells {
#define DP_C 0x64200
#define DP_D 0x64300
+#define VLV_DP_B (VLV_DISPLAY_BASE + DP_B)
+#define VLV_DP_C (VLV_DISPLAY_BASE + DP_C)
+#define CHV_DP_D (VLV_DISPLAY_BASE + DP_D)
+
#define DP_PORT_EN (1 << 31)
#define DP_PIPEB_SELECT (1 << 30)
#define DP_PIPE_MASK (1 << 30)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index fa7c10fa..e20abd5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14009,29 +14009,26 @@ static void intel_setup_outputs(struct drm_device *dev)
* eDP ports. Consult the VBT as well as DP_DETECTED to
* detect eDP ports.
*/
- if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIB) & SDVO_DETECTED &&
+ if (I915_READ(VLV_HDMIB) & SDVO_DETECTED &&
!intel_dp_is_edp(dev, PORT_B))
- intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIB,
- PORT_B);
- if (I915_READ(VLV_DISPLAY_BASE + DP_B) & DP_DETECTED ||
+ intel_hdmi_init(dev, VLV_HDMIB, PORT_B);
+ if (I915_READ(VLV_DP_B) & DP_DETECTED ||
intel_dp_is_edp(dev, PORT_B))
- intel_dp_init(dev, VLV_DISPLAY_BASE + DP_B, PORT_B);
+ intel_dp_init(dev, VLV_DP_B, PORT_B);
- if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIC) & SDVO_DETECTED &&
+ if (I915_READ(VLV_HDMIC) & SDVO_DETECTED &&
!intel_dp_is_edp(dev, PORT_C))
- intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIC,
- PORT_C);
- if (I915_READ(VLV_DISPLAY_BASE + DP_C) & DP_DETECTED ||
+ intel_hdmi_init(dev, VLV_HDMIC, PORT_C);
+ if (I915_READ(VLV_DP_C) & DP_DETECTED ||
intel_dp_is_edp(dev, PORT_C))
- intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C, PORT_C);
+ intel_dp_init(dev, VLV_DP_C, PORT_C);
if (IS_CHERRYVIEW(dev)) {
- if (I915_READ(VLV_DISPLAY_BASE + CHV_HDMID) & SDVO_DETECTED)
- intel_hdmi_init(dev, VLV_DISPLAY_BASE + CHV_HDMID,
- PORT_D);
/* eDP not supported on port D, so don't check VBT */
- if (I915_READ(VLV_DISPLAY_BASE + DP_D) & DP_DETECTED)
- intel_dp_init(dev, VLV_DISPLAY_BASE + DP_D, PORT_D);
+ if (I915_READ(CHV_HDMID) & SDVO_DETECTED)
+ intel_hdmi_init(dev, CHV_HDMID, PORT_D);
+ if (I915_READ(CHV_DP_D) & DP_DETECTED)
+ intel_dp_init(dev, CHV_DP_D, PORT_D);
}
intel_dsi_init(dev);
--
2.4.6
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