From: Alex Dai <yu.dai@xxxxxxxxx> GuC expects two bits for Render and Media domain separately when driver sends data via host2guc SAMPLE_FORCEWAKE. Bit 0 is for Render and bit 1 is for Media domain. Signed-off-by: Alex Dai <yu.dai@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_guc_submission.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 23c0a75..69f9c5e 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -158,7 +158,8 @@ static int host2guc_sample_forcewake(struct intel_guc *guc, u32 data[2]; data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE; - data[1] = (intel_enable_rc6(dev_priv->dev)) ? 1 : 0; + /* bit 0 and 1 are for Render and Media domain separately */ + data[1] = (intel_enable_rc6(dev_priv->dev)) ? 3 : 0; return host2guc_action(guc, data, 2); } -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
