Hi, There's been some discussion on improving our link training code, with one of the ideas being a complete rewrite of the state machine. However, a concern was raised over the risk of regressions. The code we have has seen a lot of real world testing, and it would take a long time for any new code to get that same exposure. On top of that, there is no explicit igt coverage for link training since it is very dependent on the hw setup. Since gathering an extensive set of hardware combinations for getting the appropriate test coverage is really difficult, I believe that we should aim at testing the link training code in isolation. That's what this RFC is about. Most of the kernel patches in this series are small changes to the hw independent part of the link training code that make it possible to move it to a separate file. Then, in the igt patch, a test is created the wraps a fake DP sink device around the link training code. The behavior of that sink device is pretty simple for now, it just tries to get the maximum voltage swing and pre-emphasis level supported. We could do some git archeology of the link training code to try to find some more tests that would make sense. I had to make a lot of hacks to get that thing to compile, so that's one of the things I'd like to hear comments on. And also on the general approach. Thanks, Ander -- 2.4.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
