On Wed, Aug 19, 2015 at 06:02:28PM -0700, Chandra Konduru wrote:
> This patch updates max supported scaler limits for NV12.
>
> v2:
> -Rebased to current kernel version 4.2.0.rc4 (me)
>
> Signed-off-by: Chandra Konduru <chandra.konduru@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 13 +++++++++----
> drivers/gpu/drm/i915/intel_drv.h | 3 ++-
> drivers/gpu/drm/i915/intel_sprite.c | 2 +-
> 3 files changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 411b211..b1d9edf 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13421,7 +13421,9 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
> }
>
> int
> -skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state)
> +skl_max_scale(struct intel_crtc *intel_crtc,
> + struct intel_crtc_state *crtc_state,
> + uint32_t pixel_format)
> {
> int max_scale;
> struct drm_device *dev;
> @@ -13441,11 +13443,13 @@ skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state
>
> /*
> * skl max scale is lower of:
> - * close to 3 but not 3, -1 is for that purpose
> + * close to 2 or 3 (NV12: 2, other formats: 3) but not equal,
> + * -1 is for that purpose
> * or
> * cdclk/crtc_clock
> */
> - max_scale = min((1 << 16) * 3 - 1, (1 << 8) * ((cdclk << 8) / crtc_clock));
> + max_scale = min((1 << 16) * (pixel_format == DRM_FORMAT_NV12 ? 2 : 3) - 1,
> + (1 << 8) * ((cdclk << 8) / crtc_clock));
Starting to be a bit messy.
Maybe something like
if (nv12)
max_scale = (2 << 16) - 1;
else
max_scale = (3 << 16) - 1;
max_scale = min(max_scale, ...);
?
>
> return max_scale;
> }
> @@ -13465,7 +13469,8 @@ intel_check_primary_plane(struct drm_plane *plane,
> if (INTEL_INFO(plane->dev)->gen >= 9 &&
> state->ckey.flags == I915_SET_COLORKEY_NONE) {
> min_scale = 1;
> - max_scale = skl_max_scale(to_intel_crtc(crtc), crtc_state);
> + max_scale = skl_max_scale(to_intel_crtc(crtc), crtc_state,
> + fb ? fb->pixel_format : 0);
> can_position = true;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 18632a4..d50b8cb 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1140,7 +1140,8 @@ void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc);
> void intel_modeset_preclose(struct drm_device *dev, struct drm_file *file);
>
> int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
> -int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
> +int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
> + uint32_t pixel_format);
>
> unsigned long intel_plane_obj_offset(struct intel_plane *intel_plane,
> struct drm_i915_gem_object *obj,
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 8b73bb8..66d60ae 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -780,7 +780,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
> if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
> can_scale = 1;
> min_scale = 1;
> - max_scale = skl_max_scale(intel_crtc, crtc_state);
> + max_scale = skl_max_scale(intel_crtc, crtc_state, fb->pixel_format);
> } else {
> can_scale = 0;
> min_scale = DRM_PLANE_HELPER_NO_SCALING;
> --
> 1.7.9.5
>
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> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
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