Re: [PATCH 18/17] drm/i915: Don't call intel_get_hpd_pins() when there's no hotplug interrupt

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On Fri, Aug 28, 2015 at 07:15:15PM -0300, Paulo Zanoni wrote:
> 2015-08-28 16:59 GMT-03:00  <ville.syrjala@xxxxxxxxxxxxxxx>:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > On GMCH plaforms we are now getting the following spew on aux
> > interrupts:
> > [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> > [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> > [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> > [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> > [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> > [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
> >
> > Prevent it by not calling intel_get_hpd_pins() unless one of the HPD
> > interrupt bits are actually set.
> >
> > I already fixed similar annoyance once with
> > 4bca26d0a6518d51a9abe64fbde4b12f04c74053 drm/i915: Use HOTPLUG_INT_STATUS_G4X on VLV/CHV
> >
> > but another source for it got added in
> > fd63e2a972c670887e5e8a08440111d3812c0996 drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins
> >
> > due to pch_get_hpd_pins() being chosen over i9xx_get_hpd_pins() to
> > serve as the new unified piece of code. pch_get_hpd_pins() had the debug
> > print, and i9xx_get_hpd_pins() didn't.
> >
> > Cc: Imre Deak <imre.deak@xxxxxxxxx>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>

All applied to dinq except for one patch that Jani picked up to -fixes.
-Daniel

> 
> > ---
> >  drivers/gpu/drm/i915/i915_irq.c | 22 ++++++++++++++--------
> >  1 file changed, 14 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 610d301..07e539d 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -1639,20 +1639,26 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
> >         if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
> >                 u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X;
> >
> > -               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> > -                                  hotplug_trigger, hpd_status_g4x,
> > -                                  i9xx_port_hotplug_long_detect);
> > -               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> > +               if (hotplug_trigger) {
> > +                       intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> > +                                          hotplug_trigger, hpd_status_g4x,
> > +                                          i9xx_port_hotplug_long_detect);
> > +
> > +                       intel_hpd_irq_handler(dev, pin_mask, long_mask);
> > +               }
> >
> >                 if (hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
> >                         dp_aux_irq_handler(dev);
> >         } else {
> >                 u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
> >
> > -               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> > -                                  hotplug_trigger, hpd_status_i915,
> > -                                  i9xx_port_hotplug_long_detect);
> > -               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> > +               if (hotplug_trigger) {
> > +                       intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> > +                                          hotplug_trigger, hpd_status_i915,
> > +                                          i9xx_port_hotplug_long_detect);
> > +
> > +                       intel_hpd_irq_handler(dev, pin_mask, long_mask);
> > +               }
> >         }
> >  }
> >
> > --
> > 2.4.6
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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