On Thu, 27 Aug 2015, Sivakumar Thulasimani <sivakumar.thulasimani@xxxxxxxxx> wrote: > From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@xxxxxxxxx> > > sink count can change between short pulse hpd hence this patch > adds a member variable to intel_dp so we can track any changes > between short pulse interrupts. > > Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@xxxxxxxxx> Provided the earlier patch gets a proper explanation, Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_dp.c | 5 ++--- > drivers/gpu/drm/i915/intel_drv.h | 1 + > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 9e4e27d..834f513 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -3898,7 +3898,6 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) > struct drm_device *dev = dig_port->base.base.dev; > struct drm_i915_private *dev_priv = dev->dev_private; > uint8_t rev; > - uint8_t reg; > > if (intel_dp_dpcd_read_wake(&intel_dp->aux, 0x000, intel_dp->dpcd, > sizeof(intel_dp->dpcd)) < 0) > @@ -3910,10 +3909,10 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) > return false; /* DPCD not present */ > > if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_SINK_COUNT, > - ®, 1) < 0) > + &intel_dp->sink_count, 1) < 0) > return false; > > - if (!DP_GET_SINK_COUNT(reg)) > + if (!DP_GET_SINK_COUNT(intel_dp->sink_count)) > return false; > > /* Check if the panel supports PSR */ > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 81b7d77..8aca5bb 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -712,6 +712,7 @@ struct intel_dp { > enum hdmi_force_audio force_audio; > bool limited_color_range; > bool color_range_auto; > + uint8_t sink_count; > uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; > uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE]; > uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; > -- > 1.7.9.5 > -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx