>From: Ville Syrjälä [mailto:ville.syrjala@xxxxxxxxxxxxxxx] >> On Wed, Aug 26, 2015 at 04:13:52PM -0300, Paulo Zanoni wrote: ... >> Although the doc for LPT _suggests_ this is only for LPT:LP, it >> doesn't mark this bit as LPT:LP-specific just like it marks all the >> other LPT:LP-specific bits in every register, so I wonder if this is >> really LPT:LP or if there's another way to find this out, like some >> strap or VBT bit. > >Hmm. Indeed. There is that note about the enable being in the north >on DevLPT:H. I guess that's what gave me the idea for this patch. But >the rest of the text just talks about PCH being on the same package or >not. Not sure if the two conditions are entirely the same thing. > >For HSW the north register says we need this on DevHSW:ULT. For BDW it >refers us to a package type indication in FUSE_STRAP3, but the only >relevant looking bit is the ULT mode bit, which it also says is >currently unused and should be ignored :( > >Art, could you help us out here? How should we actually determine >(on HSW/BDW) whether to enable the DDI A HPD in the north, south, >or both? The north and south hotplug control registers have text to try to explain this in the DDI A HPD enable fields, which I pasted below. You always enable north. You additionally enable south if CPU and PCH are in the same package. "This only applies to systems that have the CPU and PCH in the same package, where the DDI A HPD input is connected to the PCH and the HPD must be enabled in both the North Display Engine Registers HOTPLUG_CTL and the South Display Engine Registers SHOTPLUG_CTL. The HPD status is found in North Display Engine Registers HOTPLUG_CTL. On systems that have the CPU and PCH in separate packages, the DDI A HPD input is connected to the CPU, and the DDI A HPD input must be enabled in only the North Display Engine Registers HOTPLUG_CTL." That fuse may not be correct on all SKUs, but I assume you have other ways to recognize what kind of package it is. I originally listed out ULT and ULX, but it became more complicated with BDW. _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
