On Fri, 14 Aug 2015, Daniel Vetter <daniel@xxxxxxxx> wrote: > On Fri, Aug 14, 2015 at 12:59:19PM +0100, Chris Wilson wrote: >> Everytime we use the logical context with execlists it becomes dirty (as >> the hardware will write the new register values afterwards, as well as >> the GPU state that will be used). We need to then flag the context as >> dirty everytime since after a swap-out/swap-in cycle the dirty flag will >> be cleared, and a further swap-out cycle will then loose the most recent >> GPU state. >> >> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> >> Cc: stable@xxxxxxxxxxxxxxx > > Yay for reinventing active tracking I guess, legacy hw ctx has this > already. Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx> Pushed to drm-intel-fixes, thanks for the patch and review. BR, Jani. > -Daniel >> --- >> drivers/gpu/drm/i915/intel_lrc.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c >> index 138964afd187..41cfa6fa909d 100644 >> --- a/drivers/gpu/drm/i915/intel_lrc.c >> +++ b/drivers/gpu/drm/i915/intel_lrc.c >> @@ -1013,6 +1013,8 @@ static int intel_lr_context_pin(struct drm_i915_gem_request *rq) >> ret = intel_pin_and_map_ringbuffer_obj(ring->dev, ringbuf); >> if (ret) >> goto unpin_ctx_obj; >> + >> + ctx_obj->dirty = true; >> } >> >> return ret; >> -- >> 2.5.0 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
