BSpec says we shouldn't enable FBC on BDW when the pipe pixel rate exceeds 95% of the core display clock. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_fbc.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f44d101..f8f3ed3 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -946,6 +946,7 @@ struct i915_fbc { FBC_ROTATION, /* rotation is not supported */ FBC_IN_DBG_MASTER, /* kernel debugger is active */ FBC_BAD_STRIDE, /* stride is not supported */ + FBC_PIXEL_RATE, /* pixel rate is too big */ } no_fbc_reason; bool (*fbc_enabled)(struct drm_i915_private *dev_priv); diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index cfd4cba..9dee0b5 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -503,6 +503,8 @@ const char *intel_no_fbc_reason_str(enum no_fbc_reason reason) return "Kernel debugger is active"; case FBC_BAD_STRIDE: return "framebuffer stride not supported"; + case FBC_PIXEL_RATE: + return "pixel rate is too big"; default: MISSING_CASE(reason); return "unknown reason"; @@ -850,6 +852,12 @@ static void __intel_fbc_update(struct drm_i915_private *dev_priv) goto out_disable; } + if (IS_BROADWELL(dev_priv) && ilk_pipe_pixel_rate(intel_crtc->config) >= + dev_priv->max_cdclk_freq * 95 / 100) { + set_no_fbc_reason(dev_priv, FBC_PIXEL_RATE); + goto out_disable; + } + if (intel_fbc_setup_cfb(intel_crtc)) { set_no_fbc_reason(dev_priv, FBC_STOLEN_TOO_SMALL); goto out_disable; -- 2.4.6 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx