Hi Mika, On Fri, Aug 14, 2015 at 01:03:24PM +0300, Mika Kahola wrote: > It is possible the we request to have a mode that has > higher pixel clock than our HW can support. This patch > checks if requested pixel clock is lower than the one > supported by the HW. The requested mode is discarded > if we cannot support the requested pixel clock. > > This patch applies to LVDS. The spec lists maximum dot clocks for each connector type. Here's the spec for IVB for instance (see section 2.3): https://01.org/sites/default/files/documentation/ivb_ihd_os_vol3_part4.pdf E.g. for LVDS it's 224 MHz, for DP it's 270 MHz. If this is identical across all generations (which I haven't checked, but seems likely), you can use these constant values, which would be more accurate than just using the same dev_priv->max_cdclk_freq for all connector types. Best regards, Lukas _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
