On Thu, Aug 13, 2015 at 01:31:34PM -0700, Jesse Barnes wrote: > These simple tests should always pass. > > Signed-off-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> Imo shouldn't be part of the basic set, they thrash the machine quite badly. Especially gem_tiled_pread_pwrite thrashes all of memory, so nack on that one from me. At least until we've implemented the speedup with memlock that's been in JIRA since years ... For gem_tiled_pread, why not just rename to gem_tiled_pread_basic? -Daniel > --- > tests/gem_tiled_pread.c | 167 +++++++++++++++++++++-------------------- > tests/gem_tiled_pread_pwrite.c | 48 ++++++------ > 2 files changed, 112 insertions(+), 103 deletions(-) > > diff --git a/tests/gem_tiled_pread.c b/tests/gem_tiled_pread.c > index fdc5173..92bb649 100644 > --- a/tests/gem_tiled_pread.c > +++ b/tests/gem_tiled_pread.c > @@ -112,7 +112,7 @@ calculate_expected(int offset) > return (base_y + tile_y) * WIDTH + base_x + tile_x; > } > > -igt_simple_main > +igt_main > { > int fd; > int i, iter = 100; > @@ -120,96 +120,101 @@ igt_simple_main > uint32_t handle; > uint32_t devid; > > - fd = drm_open_any(); > + igt_fixture { > + fd = drm_open_any(); > > - handle = create_bo(fd); > - gem_get_tiling(fd, handle, &tiling, &swizzle); > + handle = create_bo(fd); > + gem_get_tiling(fd, handle, &tiling, &swizzle); > > - devid = intel_get_drm_devid(fd); > - > - if (IS_GEN2(devid)) { > - tile_height = 16; > - tile_width = 128; > - tile_size = 2048; > - } else { > - tile_height = 8; > - tile_width = 512; > - tile_size = PAGE_SIZE; > + devid = intel_get_drm_devid(fd); > } > > - /* Read a bunch of random subsets of the data and check that they come > - * out right. > - */ > - for (i = 0; i < iter; i++) { > - int size = WIDTH * HEIGHT * 4; > - int offset = (random() % size) & ~3; > - int len = (random() % size) & ~3; > - int j; > + igt_subtest("basic") { > > - if (len == 0) > - len = 4; > + if (IS_GEN2(devid)) { > + tile_height = 16; > + tile_width = 128; > + tile_size = 2048; > + } else { > + tile_height = 8; > + tile_width = 512; > + tile_size = PAGE_SIZE; > + } > > - if (offset + len > size) > - len = size - offset; > + /* Read a bunch of random subsets of the data and check that they come > + * out right. > + */ > + for (i = 0; i < iter; i++) { > + int size = WIDTH * HEIGHT * 4; > + int offset = (random() % size) & ~3; > + int len = (random() % size) & ~3; > + int j; > > - if (i == 0) { > - offset = 0; > - len = size; > - } > + if (len == 0) > + len = 4; > > - gem_read(fd, handle, offset, linear, len); > + if (offset + len > size) > + len = size - offset; > > - /* Translate from offsets in the read buffer to the swizzled > - * address that it corresponds to. This is the opposite of > - * what Mesa does (calculate offset to be read given the linear > - * offset it's looking for). > - */ > - for (j = offset; j < offset + len; j += 4) { > - uint32_t expected_val, found_val; > - int swizzled_offset; > - const char *swizzle_str; > - > - switch (swizzle) { > - case I915_BIT_6_SWIZZLE_NONE: > - swizzled_offset = j; > - swizzle_str = "none"; > - break; > - case I915_BIT_6_SWIZZLE_9: > - swizzled_offset = j ^ > - swizzle_bit(9, j); > - swizzle_str = "bit9"; > - break; > - case I915_BIT_6_SWIZZLE_9_10: > - swizzled_offset = j ^ > - swizzle_bit(9, j) ^ > - swizzle_bit(10, j); > - swizzle_str = "bit9^10"; > - break; > - case I915_BIT_6_SWIZZLE_9_11: > - swizzled_offset = j ^ > - swizzle_bit(9, j) ^ > - swizzle_bit(11, j); > - swizzle_str = "bit9^11"; > - break; > - case I915_BIT_6_SWIZZLE_9_10_11: > - swizzled_offset = j ^ > - swizzle_bit(9, j) ^ > - swizzle_bit(10, j) ^ > - swizzle_bit(11, j); > - swizzle_str = "bit9^10^11"; > - break; > - default: > - igt_assert_f(0, "Bad swizzle bits; %d\n", > - swizzle); > + if (i == 0) { > + offset = 0; > + len = size; > + } > + > + gem_read(fd, handle, offset, linear, len); > + > + /* Translate from offsets in the read buffer to the swizzled > + * address that it corresponds to. This is the opposite of > + * what Mesa does (calculate offset to be read given the linear > + * offset it's looking for). > + */ > + for (j = offset; j < offset + len; j += 4) { > + uint32_t expected_val, found_val; > + int swizzled_offset; > + const char *swizzle_str; > + > + switch (swizzle) { > + case I915_BIT_6_SWIZZLE_NONE: > + swizzled_offset = j; > + swizzle_str = "none"; > + break; > + case I915_BIT_6_SWIZZLE_9: > + swizzled_offset = j ^ > + swizzle_bit(9, j); > + swizzle_str = "bit9"; > + break; > + case I915_BIT_6_SWIZZLE_9_10: > + swizzled_offset = j ^ > + swizzle_bit(9, j) ^ > + swizzle_bit(10, j); > + swizzle_str = "bit9^10"; > + break; > + case I915_BIT_6_SWIZZLE_9_11: > + swizzled_offset = j ^ > + swizzle_bit(9, j) ^ > + swizzle_bit(11, j); > + swizzle_str = "bit9^11"; > + break; > + case I915_BIT_6_SWIZZLE_9_10_11: > + swizzled_offset = j ^ > + swizzle_bit(9, j) ^ > + swizzle_bit(10, j) ^ > + swizzle_bit(11, j); > + swizzle_str = "bit9^10^11"; > + break; > + default: > + igt_assert_f(0, "Bad swizzle bits; %d\n", > + swizzle); > + } > + expected_val = calculate_expected(swizzled_offset); > + found_val = linear[(j - offset) / 4]; > + igt_assert_f(expected_val == found_val, > + "Bad read [%d]: %d instead of %d at 0x%08x " > + "for read from 0x%08x to 0x%08x, swizzle=%s\n", > + i, found_val, expected_val, j, > + offset, offset + len, > + swizzle_str); > } > - expected_val = calculate_expected(swizzled_offset); > - found_val = linear[(j - offset) / 4]; > - igt_assert_f(expected_val == found_val, > - "Bad read [%d]: %d instead of %d at 0x%08x " > - "for read from 0x%08x to 0x%08x, swizzle=%s\n", > - i, found_val, expected_val, j, > - offset, offset + len, > - swizzle_str); > } > } > > diff --git a/tests/gem_tiled_pread_pwrite.c b/tests/gem_tiled_pread_pwrite.c > index 3d8fdc9..efb56d5 100644 > --- a/tests/gem_tiled_pread_pwrite.c > +++ b/tests/gem_tiled_pread_pwrite.c > @@ -101,7 +101,7 @@ create_bo(int fd) > return handle; > } > > -igt_simple_main > +igt_main > { > int fd; > uint32_t *data; > @@ -109,34 +109,38 @@ igt_simple_main > uint32_t tiling, swizzle; > uint32_t handle, handle_target; > int count; > - > - fd = drm_open_any(); > - count = SLOW_QUICK(intel_get_total_ram_mb() * 9 / 10, 8) ; > > - for (i = 0; i < count/2; i++) { > - current_tiling_mode = I915_TILING_X; > + igt_fixture { > + fd = drm_open_any(); > + count = SLOW_QUICK(intel_get_total_ram_mb() * 9 / 10, 8); > + } > + > + igt_subtest("basic") { > + for (i = 0; i < count/2; i++) { > + current_tiling_mode = I915_TILING_X; > > - handle = create_bo_and_fill(fd); > - gem_get_tiling(fd, handle, &tiling, &swizzle); > + handle = create_bo_and_fill(fd); > + gem_get_tiling(fd, handle, &tiling, &swizzle); > > - gem_read(fd, handle, 0, linear, sizeof(linear)); > + gem_read(fd, handle, 0, linear, sizeof(linear)); > > - handle_target = create_bo(fd); > - gem_write(fd, handle_target, 0, linear, sizeof(linear)); > + handle_target = create_bo(fd); > + gem_write(fd, handle_target, 0, linear, sizeof(linear)); > > - /* Check the target bo's contents. */ > - data = gem_mmap(fd, handle_target, sizeof(linear), PROT_READ | PROT_WRITE); > - for (j = 0; j < WIDTH*HEIGHT; j++) > - igt_assert_f(data[j] == j, > - "mismatch at %i: %i\n", > - j, data[j]); > - munmap(data, sizeof(linear)); > + /* Check the target bo's contents. */ > + data = gem_mmap(fd, handle_target, sizeof(linear), PROT_READ | PROT_WRITE); > + for (j = 0; j < WIDTH*HEIGHT; j++) > + igt_assert_f(data[j] == j, > + "mismatch at %i: %i\n", > + j, data[j]); > + munmap(data, sizeof(linear)); > > - /* Leak both bos so that we use all of system mem! */ > - gem_madvise(fd, handle_target, I915_MADV_DONTNEED); > - gem_madvise(fd, handle, I915_MADV_DONTNEED); > + /* Leak both bos so that we use all of system mem! */ > + gem_madvise(fd, handle_target, I915_MADV_DONTNEED); > + gem_madvise(fd, handle, I915_MADV_DONTNEED); > > - igt_progress("gem_tiled_pread_pwrite: ", i, count/2); > + igt_progress("gem_tiled_pread_pwrite: ", i, count/2); > + } > } > > close(fd); > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx