jn Wed, Aug 12, 2015 at 03:23:45PM +0530, vikas.korjani@xxxxxxxxx wrote: > From: vkorjani <vikas.korjani@xxxxxxxxx> > > s RFC is for feature Display Stream Compression (DSC) for BXT, > It is a VESA defined standard to compress and decompress image in display > streams in a link independent manner. Some of the basic requirements of > the standard are to support higher resolution on a given display link > with fewer lanes or lower rate. > > DSC is architected to work in current Intel Display Engine design > without modification how current display pipeline works. DSC hardware > as per HAS is in b/n port and MIPI DSI controller. so most of the > changes are at port level. > > At begining of frame display can start sending valid pixels to DSC > at normal rate, DSC start compressing this image according to > pps parameters programmed already to 8bpp, 10bpp, 12bpp. > > /*This bitstream is temprory stored in output buffer and sent as byte > stream to DSI controller as soon as it is valid. > */ Where exactly is that bistream stored? In some on-chip buffer which is hidden from us, or do we need to allocate some memory for this? I din't spot anything of the latter form ... -Daniel > Following are the set of patches as per initial design in HLD, one > can refer DSC HLD if more details about the changes is required. > > Tested these patches on fulsim simulation enviornment. > > > vkorjani (8): > drm/915/bxt: Adding DSC VBT parameter and PPS structures > drm/i915/bxt: Adding registers to support DSC > drm/i915/bxt: Init PPS, Calculate DSI frequency and DPHY parameters > for DSC > drm/i915/bxt: MIPI DSI Register Programming for DSC > drm/i915/bxt: Program MIPI_DPI_RESOLUTION for DSC > drm/i915/bxt: Enable/Disable DSC and programme PPS. > drm: Add support for pps and compression mode command packet > drm/i915/bxt: Send PPS packet and compression mode command packet > > drivers/gpu/drm/drm_mipi_dsi.c | 29 +++ > drivers/gpu/drm/i915/i915_drv.h | 2 + > drivers/gpu/drm/i915/i915_reg.h | 126 +++++++++++++ > drivers/gpu/drm/i915/intel_bios.h | 74 ++++++++ > drivers/gpu/drm/i915/intel_dsi.c | 274 ++++++++++++++++++++++++++-- > drivers/gpu/drm/i915/intel_dsi.h | 5 + > drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 23 +++ > drivers/gpu/drm/i915/intel_dsi_pll.c | 24 ++- > include/drm/drm_mipi_dsi.h | 4 +- > include/video/mipi_display.h | 3 + > 10 files changed, 539 insertions(+), 25 deletions(-) > > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
