From: vkorjani <vikas.korjani@xxxxxxxxx>
This patch adds register definitions required to support
DSC feature.
Signed-off-by: vkorjani <vikas.korjani@xxxxxxxxx>
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_reg.h | 126 +++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_bios.h | 1 +
2 files changed, 127 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0b1d7ff..b41da94 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7666,12 +7666,15 @@ enum skl_disp_power_wells {
#define CMD_MODE_DATA_WIDTH_8_BIT (3 << 13)
#define CMD_MODE_DATA_WIDTH_OPTION1 (4 << 13)
#define CMD_MODE_DATA_WIDTH_OPTION2 (5 << 13)
+#define CMD_MODE_DATA_WIDTH_OPTION2_SKIP_LAST (6 << 13)
+#define CMD_MODE_DATA_WIDTH_OPTION2_SKIP_LAST2 (7 << 13)
#define VID_MODE_FORMAT_MASK (0xf << 7)
#define VID_MODE_NOT_SUPPORTED (0 << 7)
#define VID_MODE_FORMAT_RGB565 (1 << 7)
#define VID_MODE_FORMAT_RGB666 (2 << 7)
#define VID_MODE_FORMAT_RGB666_LOOSE (3 << 7)
#define VID_MODE_FORMAT_RGB888 (4 << 7)
+#define VID_MODE_FORMAT_COMPRESSED (8 << 7)
#define CMD_MODE_CHANNEL_NUMBER_SHIFT 5
#define CMD_MODE_CHANNEL_NUMBER_MASK (3 << 5)
#define VID_MODE_CHANNEL_NUMBER_SHIFT 3
@@ -7965,6 +7968,7 @@ enum skl_disp_power_wells {
#define BXT_PIPE_SELECT_C (2 << 7)
#define BXT_PIPE_SELECT_B (1 << 7)
#define BXT_PIPE_SELECT_A (0 << 7)
+#define BXT_DSC_ENABLE (1 << 3)
#define _MIPIA_DATA_ADDRESS (dev_priv->mipi_mmio_base + 0xb108)
#define _MIPIC_DATA_ADDRESS (dev_priv->mipi_mmio_base + 0xb908)
@@ -8010,6 +8014,128 @@ enum skl_disp_power_wells {
_MIPIA_READ_DATA_VALID, _MIPIC_READ_DATA_VALID)
#define READ_DATA_VALID(n) (1 << (n))
+#define DSC_A_PICTURE_PARAMETER_SET_0 (dev_priv->mipi_mmio_base + 0xb200)
+#define DSC_A_PICTURE_PARAMETER_SET_1 (dev_priv->mipi_mmio_base + 0xb204)
+#define DSC_A_PICTURE_PARAMETER_SET_2 (dev_priv->mipi_mmio_base + 0xb208)
+#define DSC_A_PICTURE_PARAMETER_SET_3 (dev_priv->mipi_mmio_base + 0xb20c)
+#define DSC_A_PICTURE_PARAMETER_SET_4 (dev_priv->mipi_mmio_base + 0xb210)
+#define DSC_A_PICTURE_PARAMETER_SET_5 (dev_priv->mipi_mmio_base + 0xb214)
+#define DSC_A_PICTURE_PARAMETER_SET_6 (dev_priv->mipi_mmio_base + 0xb218)
+#define DSC_A_PICTURE_PARAMETER_SET_7 (dev_priv->mipi_mmio_base + 0xb21c)
+#define DSC_A_PICTURE_PARAMETER_SET_8 (dev_priv->mipi_mmio_base + 0xb220)
+#define DSC_A_PICTURE_PARAMETER_SET_9 (dev_priv->mipi_mmio_base + 0xb224)
+#define DSC_A_PICTURE_PARAMETER_SET_10 (dev_priv->mipi_mmio_base + 0xb228)
+#define DSC_A_PICTURE_PARAMETER_SET_11 (dev_priv->mipi_mmio_base + 0xb22c)
+#define DSC_A_PICTURE_PARAMETER_SET_12 (dev_priv->mipi_mmio_base + 0xb260)
+#define DSC_A_PICTURE_PARAMETER_SET_13 (dev_priv->mipi_mmio_base + 0xb264)
+#define DSC_A_PICTURE_PARAMETER_SET_14 (dev_priv->mipi_mmio_base + 0xb268)
+#define DSC_A_PICTURE_PARAMETER_SET_15 (dev_priv->mipi_mmio_base + 0xb26c)
+#define DSC_A_PICTURE_PARAMETER_SET_16 (dev_priv->mipi_mmio_base + 0xb270)
+#define DSC_A_RC_BUF_THRESH_0_3 (dev_priv->mipi_mmio_base + 0xb230)
+#define DSC_A_RC_BUF_THRESH_4_7 (dev_priv->mipi_mmio_base + 0xb234)
+#define DSC_A_RC_BUF_THRESH_8_11 (dev_priv->mipi_mmio_base + 0xb238)
+#define DSC_A_RC_BUF_THRESH_12_13 (dev_priv->mipi_mmio_base + 0xb23C)
+#define DSC_A_RC_RANGE_PARAMETERS_0 (dev_priv->mipi_mmio_base + 0xb240)
+#define DSC_A_RC_RANGE_PARAMETERS_1 (dev_priv->mipi_mmio_base + 0xb244)
+#define DSC_A_RC_RANGE_PARAMETERS_2 (dev_priv->mipi_mmio_base + 0xb248)
+#define DSC_A_RC_RANGE_PARAMETERS_3 (dev_priv->mipi_mmio_base + 0xb24C)
+#define DSC_A_RC_RANGE_PARAMETERS_4 (dev_priv->mipi_mmio_base + 0xb250)
+#define DSC_A_RC_RANGE_PARAMETERS_5 (dev_priv->mipi_mmio_base + 0xb254)
+#define DSC_A_RC_RANGE_PARAMETERS_6 (dev_priv->mipi_mmio_base + 0xb258)
+#define DSC_A_RC_RANGE_PARAMETERS_7 (dev_priv->mipi_mmio_base + 0xb25C)
+
+#define DSC_C_PICTURE_PARAMETER_SET_0 (dev_priv->mipi_mmio_base + 0xba00)
+#define DSC_C_PICTURE_PARAMETER_SET_1 (dev_priv->mipi_mmio_base + 0xba04)
+#define DSC_C_PICTURE_PARAMETER_SET_2 (dev_priv->mipi_mmio_base + 0xba08)
+#define DSC_C_PICTURE_PARAMETER_SET_3 (dev_priv->mipi_mmio_base + 0xba0c)
+#define DSC_C_PICTURE_PARAMETER_SET_4 (dev_priv->mipi_mmio_base + 0xba10)
+#define DSC_C_PICTURE_PARAMETER_SET_5 (dev_priv->mipi_mmio_base + 0xba14)
+#define DSC_C_PICTURE_PARAMETER_SET_6 (dev_priv->mipi_mmio_base + 0xba18)
+#define DSC_C_PICTURE_PARAMETER_SET_7 (dev_priv->mipi_mmio_base + 0xba1c)
+#define DSC_C_PICTURE_PARAMETER_SET_8 (dev_priv->mipi_mmio_base + 0xba20)
+#define DSC_C_PICTURE_PARAMETER_SET_9 (dev_priv->mipi_mmio_base + 0xba24)
+#define DSC_C_PICTURE_PARAMETER_SET_10 (dev_priv->mipi_mmio_base + 0xba28)
+#define DSC_C_PICTURE_PARAMETER_SET_11 (dev_priv->mipi_mmio_base + 0xba2c)
+#define DSC_C_PICTURE_PARAMETER_SET_12 (dev_priv->mipi_mmio_base + 0xba60)
+#define DSC_C_PICTURE_PARAMETER_SET_13 (dev_priv->mipi_mmio_base + 0xba64)
+#define DSC_C_PICTURE_PARAMETER_SET_14 (dev_priv->mipi_mmio_base + 0xba68)
+#define DSC_C_PICTURE_PARAMETER_SET_15 (dev_priv->mipi_mmio_base + 0xba6c)
+#define DSC_C_PICTURE_PARAMETER_SET_16 (dev_priv->mipi_mmio_base + 0xba70)
+#define DSC_C_RC_BUF_THRESH_0_3 (dev_priv->mipi_mmio_base + 0xba30)
+#define DSC_C_RC_BUF_THRESH_4_7 (dev_priv->mipi_mmio_base + 0xba34)
+#define DSC_C_RC_BUF_THRESH_8_11 (dev_priv->mipi_mmio_base + 0xba38)
+#define DSC_C_RC_BUF_THRESH_12_13 (dev_priv->mipi_mmio_base + 0xba3C)
+#define DSC_C_RC_RANGE_PARAMETERS_0 (dev_priv->mipi_mmio_base + 0xba40)
+#define DSC_C_RC_RANGE_PARAMETERS_1 (dev_priv->mipi_mmio_base + 0xba44)
+#define DSC_C_RC_RANGE_PARAMETERS_2 (dev_priv->mipi_mmio_base + 0xba48)
+#define DSC_C_RC_RANGE_PARAMETERS_3 (dev_priv->mipi_mmio_base + 0xba4C)
+#define DSC_C_RC_RANGE_PARAMETERS_4 (dev_priv->mipi_mmio_base + 0xba50)
+#define DSC_C_RC_RANGE_PARAMETERS_5 (dev_priv->mipi_mmio_base + 0xba54)
+#define DSC_C_RC_RANGE_PARAMETERS_6 (dev_priv->mipi_mmio_base + 0xba58)
+#define DSC_C_RC_RANGE_PARAMETERS_7 (dev_priv->mipi_mmio_base + 0xba5C)
+
+#define DSC_PICTURE_PARAMETER_SET_0(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_0, DSC_C_PICTURE_PARAMETER_SET_0)
+#define DSC_PICTURE_PARAMETER_SET_1(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_1, DSC_C_PICTURE_PARAMETER_SET_1)
+#define DSC_PICTURE_PARAMETER_SET_2(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_2, DSC_C_PICTURE_PARAMETER_SET_2)
+#define DSC_PICTURE_PARAMETER_SET_3(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_3, DSC_C_PICTURE_PARAMETER_SET_3)
+#define DSC_PICTURE_PARAMETER_SET_4(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_4, DSC_C_PICTURE_PARAMETER_SET_4)
+#define DSC_PICTURE_PARAMETER_SET_5(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_5, DSC_C_PICTURE_PARAMETER_SET_5)
+#define DSC_PICTURE_PARAMETER_SET_6(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_6, DSC_C_PICTURE_PARAMETER_SET_6)
+#define DSC_PICTURE_PARAMETER_SET_7(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_7, DSC_C_PICTURE_PARAMETER_SET_7)
+#define DSC_PICTURE_PARAMETER_SET_8(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_8, DSC_C_PICTURE_PARAMETER_SET_8)
+#define DSC_PICTURE_PARAMETER_SET_9(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_9, DSC_C_PICTURE_PARAMETER_SET_9)
+#define DSC_PICTURE_PARAMETER_SET_10(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_10, DSC_C_PICTURE_PARAMETER_SET_10)
+#define DSC_PICTURE_PARAMETER_SET_11(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_11, DSC_C_PICTURE_PARAMETER_SET_11)
+#define DSC_PICTURE_PARAMETER_SET_12(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_12, DSC_C_PICTURE_PARAMETER_SET_12)
+#define DSC_PICTURE_PARAMETER_SET_13(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_13, DSC_C_PICTURE_PARAMETER_SET_13)
+#define DSC_PICTURE_PARAMETER_SET_14(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_14, DSC_C_PICTURE_PARAMETER_SET_14)
+#define DSC_PICTURE_PARAMETER_SET_15(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_15, DSC_C_PICTURE_PARAMETER_SET_15)
+#define DSC_PICTURE_PARAMETER_SET_16(port) _TRANSCODER(port, \
+ DSC_A_PICTURE_PARAMETER_SET_16, DSC_C_PICTURE_PARAMETER_SET_16)
+#define DSC_RC_BUF_THRESH_0_3(port) _TRANSCODER(port, \
+ DSC_A_RC_BUF_THRESH_0_3, DSC_C_RC_BUF_THRESH_0_3)
+#define DSC_RC_BUF_THRESH_4_7(port) _TRANSCODER(port, \
+ DSC_A_RC_BUF_THRESH_4_7, DSC_C_RC_BUF_THRESH_4_7)
+#define DSC_RC_BUF_THRESH_8_11(port) _TRANSCODER(port, \
+ DSC_A_RC_BUF_THRESH_8_11, DSC_C_RC_BUF_THRESH_8_11)
+#define DSC_RC_BUF_THRESH_12_13(port) _TRANSCODER(port, \
+ DSC_A_RC_BUF_THRESH_12_13, DSC_C_RC_BUF_THRESH_12_13)
+#define DSC_RC_RANGE_PARAMETERS_0(port) _TRANSCODER(port, \
+ DSC_A_RC_RANGE_PARAMETERS_0, DSC_C_RC_RANGE_PARAMETERS_0)
+#define DSC_RC_RANGE_PARAMETERS_1(port) _TRANSCODER(port, \
+ DSC_A_RC_RANGE_PARAMETERS_1, DSC_C_RC_RANGE_PARAMETERS_1)
+#define DSC_RC_RANGE_PARAMETERS_2(port) _TRANSCODER(port, \
+ DSC_A_RC_RANGE_PARAMETERS_2, DSC_C_RC_RANGE_PARAMETERS_2)
+#define DSC_RC_RANGE_PARAMETERS_3(port) _TRANSCODER(port, \
+ DSC_A_RC_RANGE_PARAMETERS_3, DSC_C_RC_RANGE_PARAMETERS_3)
+#define DSC_RC_RANGE_PARAMETERS_4(port) _TRANSCODER(port, \
+ DSC_A_RC_RANGE_PARAMETERS_4, DSC_C_RC_RANGE_PARAMETERS_4)
+#define DSC_RC_RANGE_PARAMETERS_5(port) _TRANSCODER(port, \
+ DSC_A_RC_RANGE_PARAMETERS_5, DSC_C_RC_RANGE_PARAMETERS_5)
+#define DSC_RC_RANGE_PARAMETERS_6(port) _TRANSCODER(port, \
+ DSC_A_RC_RANGE_PARAMETERS_6, DSC_C_RC_RANGE_PARAMETERS_6)
+#define DSC_RC_RANGE_PARAMETERS_7(port) _TRANSCODER(port, \
+ DSC_A_RC_RANGE_PARAMETERS_7, DSC_C_RC_RANGE_PARAMETERS_7)
+
+#define DSC_CRC_CTL (dev_priv->mipi_mmio_base + 0xb284)
+#define DSC_CRC_RES (dev_priv->mipi_mmio_base + 0xb288)
+
/* For UMS only (deprecated): */
#define _PALETTE_A (dev_priv->info.display_mmio_offset + 0xa000)
#define _PALETTE_B (dev_priv->info.display_mmio_offset + 0xa800)
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 8bc7c87..6b4d664 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -875,6 +875,7 @@ struct mipi_config {
#define PIXEL_FORMAT_RGB666 0x2
#define PIXEL_FORMAT_RGB666_LOOSELY_PACKED 0x3
#define PIXEL_FORMAT_RGB888 0x4
+#define PIXEL_FORMAT_COMPRESSED 0x8
u32 videomode_color_format:4;
/* Bit 15:14 */
--
1.7.9.5
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