On Tue, Aug 11, 2015 at 04:30:10AM +0000, Jindal, Sonika wrote: > I replied to Daniel last time. Pasting it on mailing list as well: > > "Yes this is tested on android with HW tracking. Not sure about enabling > by default part. But this patch will be anyways required. I'd like it to be tested with igt testcases from Paulo/Rodrigo though since that's what we use for upstream validation and to make sure all upstream use-cases are working too. Otherwise we just make an accounting trick and shift the maintainenance burden from android to upstream without being able to use the code really. And looking at psr fixing up the last 10% took 90% of all the effort. And if there are failures still in the current igts (both kms_psr and kms_frontbuffer_tracking) then I want a plan for how to get this all addressed. -Daniel > > Regards, > Sonika" > > -----Original Message----- > From: Daniel Vetter [mailto:daniel.vetter@xxxxxxxx] On Behalf Of Daniel Vetter > Sent: Tuesday, July 21, 2015 3:18 PM > To: Lespiau, Damien > Cc: Jindal, Sonika; intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: Re: [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms > > On Tue, Jul 21, 2015 at 10:31:19AM +0100, Damien Lespiau wrote: > > On Tue, Jul 21, 2015 at 02:48:31PM +0530, Sonika Jindal wrote: > > > This is to get PSR support for bxt. > > > > > > Signed-off-by: Sonika Jindal <sonika.jindal@xxxxxxxxx> > > > > Maybe with a drm/i915/bxt prefix: > > > > Reviewed-by: Damien Lespiau <damien.lespiau@xxxxxxxxx> > > Is this actually tested? Can we maybe enable psr by default (Rodrigo seems so close ...)? > -Daniel > > > > > -- > > Damien > > > > > --- > > > drivers/gpu/drm/i915/i915_drv.h | 5 ++--- > > > 1 file changed, 2 insertions(+), 3 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > > b/drivers/gpu/drm/i915/i915_drv.h index 718170c..54d2729 100644 > > > --- a/drivers/gpu/drm/i915/i915_drv.h > > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > > @@ -2537,9 +2537,8 @@ struct drm_i915_cmd_table { > > > > > > #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) > > > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) > > > -#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \ > > > - IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \ > > > - IS_SKYLAKE(dev)) > > > +#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_VALLEYVIEW(dev) || \ > > > + INTEL_INFO(dev)->gen >= 8) > > > #define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \ > > > IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \ > > > IS_SKYLAKE(dev)) > > > -- > > > 1.7.10.4 > > > > > > _______________________________________________ > > > Intel-gfx mailing list > > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
