If the set of pages is being imported from another device, we cannot assume that it is fully coherent with the CPU cache, so mark it as such. However, if the source is the shared memory vgem allocator, we could treat the buffer as being cached (so long as all parties agree in the case the same buffer is shared between multiple devices) but as of today, vgem cannot export dma-bufs. Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Daniel Vetter <daniel.vetter@xxxxxxxx> --- drivers/gpu/drm/i915/i915_gem_dmabuf.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c index 7748d57adffd..da5e4fb02350 100644 --- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c +++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c @@ -265,8 +265,22 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev, i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops); obj->base.import_attach = attach; + /* This bo is imported from a foreign HW device with which we cannot + * assume any coherency. Note that if this dma-buf was imported from + * a simple page allocator, like vgem, then we could treat this as + * cacheable (so long as all parties agree on that convention - i.e. + * if the same bo was shared with nouveau/radeon they also treat it + * as CPU cacheeable so that coherency is maintained between all + * parties). + */ + ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE); + if (ret) + goto fail_obj; + return &obj->base; +fail_obj: + drm_gem_object_unreference(&obj->base); fail_detach: dma_buf_detach(dma_buf, attach); dma_buf_put(dma_buf); -- 2.5.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
