On 06/08/2015 15:45, Mika Kuoppala wrote:
"Siluvery, Arun" <arun.siluvery@xxxxxxxxxxxxxxx> writes:
On 06/08/2015 14:51, Mika Kuoppala wrote:
Add WaDisableSbeCacheDispatchPortSharing:skl
Cc: Arun Siluvery <arun.siluvery@xxxxxxxxxxxxxxx>
Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 1c14233..1a10358 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1059,6 +1059,13 @@ static int skl_init_workarounds(struct intel_engine_cs *ring)
HDC_FENCE_DEST_SLM_DISABLE |
HDC_BARRIER_PERFORMANCE_DISABLE);
+ /* WaDisableSbeCacheDispatchPortSharing:skl */
+ if (INTEL_REVID(dev) <= SKL_REVID_F0) {
+ WA_SET_BIT_MASKED(
+ GEN7_HALF_SLICE_CHICKEN1,
+ GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
+ }
+
seems to be applicable for BXT also until B0.
Yes, we have that in bxt_init_workarounds. I pondered
it is more clean to have rev check for each in their
respective setup functions.
fine with this.
Reviewed-by: Arun Siluvery <arun.siluvery@xxxxxxxxxxxxxxx>
regards
Arun
-Mika
regards
Arun
return skl_tune_iz_hashing(ring);
}
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