From: Sourab Gupta <sourab.gupta@xxxxxxxxx>
This patch introduces flags and adds support for having pid output with the
OA reports generated through the RCS commands.
When the userspace expresses its interest in listening to the pid through
an oa_attr field during event init, the OA reports generated would have an
additional field appended with the pid information. The patches enables
this framework, which can be expanded upon to introduce further fields in
the OA report metadata.
Signed-off-by: Sourab Gupta <sourab.gupta@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_drv.h | 3 +++
drivers/gpu/drm/i915/i915_oa_perf.c | 19 ++++++++++++++++++-
include/uapi/drm/i915_drm.h | 8 +++++++-
3 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5c15e30..6e6f1be 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1672,6 +1672,7 @@ struct i915_oa_rcs_node {
u32 offset;
bool discard;
u32 ctx_id;
+ u32 pid;
};
extern const struct i915_oa_reg i915_oa_3d_mux_config_hsw[];
@@ -1981,6 +1982,8 @@ struct drm_i915_private {
struct list_head node_list;
struct work_struct forward_work;
struct work_struct event_destroy_work;
+#define I915_OA_SAMPLE_PID (1<<0)
+ int sample_info_flags;
} oa_pmu;
void (*emit_profiling_data[I915_PROFILE_MAX])
diff --git a/drivers/gpu/drm/i915/i915_oa_perf.c b/drivers/gpu/drm/i915/i915_oa_perf.c
index e3bc8e0..f4b8a2b 100644
--- a/drivers/gpu/drm/i915/i915_oa_perf.c
+++ b/drivers/gpu/drm/i915/i915_oa_perf.c
@@ -69,6 +69,8 @@ static void i915_oa_emit_perf_report(struct drm_i915_gem_request *req,
}
entry->ctx_id = global_ctx_id;
+ if (dev_priv->oa_pmu.sample_info_flags & I915_OA_SAMPLE_PID)
+ entry->pid = current->pid;
i915_gem_request_assign(&entry->req, ring->outstanding_lazy_request);
spin_lock_irqsave(&dev_priv->oa_pmu.lock, lock_flags);
@@ -303,8 +305,9 @@ static void forward_one_oa_rcs_sample(struct drm_i915_private *dev_priv,
struct perf_sample_data data;
struct perf_event *event = dev_priv->oa_pmu.exclusive_event;
int format_size, snapshot_size;
- u8 *snapshot;
+ u8 *snapshot, *current_ptr;
struct drm_i915_oa_node_ctx_id *ctx_info;
+ struct drm_i915_oa_node_pid *pid_info;
struct perf_raw_record raw;
u64 snapshot_ts;
@@ -314,6 +317,14 @@ static void forward_one_oa_rcs_sample(struct drm_i915_private *dev_priv,
ctx_info = (struct drm_i915_oa_node_ctx_id *)(snapshot + format_size);
ctx_info->ctx_id = node->ctx_id;
+ current_ptr = snapshot + snapshot_size;
+
+ if (dev_priv->oa_pmu.sample_info_flags & I915_OA_SAMPLE_PID) {
+ pid_info = (struct drm_i915_oa_node_pid *)current_ptr;
+ pid_info->pid = node->pid;
+ snapshot_size += sizeof(*pid_info);
+ current_ptr = snapshot + snapshot_size;
+ }
/* Flush the periodic snapshots till the ts of this OA report */
snapshot_ts = *(u64 *)(snapshot + 4);
@@ -672,6 +683,9 @@ static int init_oa_rcs_buffer(struct perf_event *event)
node_size = dev_priv->oa_pmu.oa_rcs_buffer.format_size +
sizeof(struct drm_i915_oa_node_ctx_id);
+ if (dev_priv->oa_pmu.sample_info_flags & I915_OA_SAMPLE_PID)
+ node_size += sizeof(struct drm_i915_oa_node_pid);
+
/* node size has to be aligned to 64 bytes, since only 64 byte aligned
* addresses can be given to OA unit for dumping OA reports */
node_size = ALIGN(node_size, 64);
@@ -824,6 +838,9 @@ static int i915_oa_event_init(struct perf_event *event)
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
dev_priv->oa_pmu.multiple_ctx_mode = true;
+ if (oa_attr.sample_pid)
+ dev_priv->oa_pmu.sample_info_flags |=
+ I915_OA_SAMPLE_PID;
}
report_format = oa_attr.format;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index e97b2fd..65e8297 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -93,7 +93,8 @@ typedef struct _drm_i915_oa_attr {
__u64 single_context : 1,
multiple_context_mode:1,
- __reserved_1:62;
+ sample_pid:1,
+ __reserved_1:61;
} drm_i915_oa_attr_t;
/* Header for PERF_RECORD_DEVICE type events */
@@ -128,6 +129,11 @@ struct drm_i915_oa_node_ctx_id {
__u32 pad;
};
+struct drm_i915_oa_node_pid {
+ __u32 pid;
+ __u32 pad;
+};
+
/* Each region is a minimum of 16k, and there are at most 255 of them.
*/
#define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use
--
1.8.5.1
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