On Thu, Jul 23, 2015 at 04:35:47PM -0700, Rodrigo Vivi wrote: > No functional change. Just a preparation patch to make clear > what operation we are performing. > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Good. The place where you call hsw_disable_ips() changes, but as you explained earlier, this is required. Reviewed-by: Rafael Antognolli <rafael.antognolli@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_dp.c | 89 +++++++++++++++++++++++------------------ > 1 file changed, 50 insertions(+), 39 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 44f8a32..10cbc98 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -3958,40 +3958,64 @@ intel_dp_probe_mst(struct intel_dp *intel_dp) > return intel_dp->is_mst; > } > > -int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc) > +static void intel_dp_sink_crc_stop(struct intel_dp *intel_dp) > { > - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); > - struct drm_device *dev = intel_dig_port->base.base.dev; > - struct intel_crtc *intel_crtc = > - to_intel_crtc(intel_dig_port->base.base.crtc); > + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > + struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc); > u8 buf; > - int test_crc_count; > - int attempts = 6; > - int ret = 0; > - > - hsw_disable_ips(intel_crtc); > > - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0) { > - ret = -EIO; > - goto out; > + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) { > + DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n"); > + return; > } > > - if (!(buf & DP_TEST_CRC_SUPPORTED)) { > - ret = -ENOTTY; > - goto out; > - } > + if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK, > + buf & ~DP_TEST_SINK_START) < 0) > + DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n"); > > - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) { > - ret = -EIO; > - goto out; > - } > + hsw_enable_ips(intel_crtc); > +} > + > +static int intel_dp_sink_crc_start(struct intel_dp *intel_dp) > +{ > + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > + struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc); > + u8 buf; > + > + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0) > + return -EIO; > + > + if (!(buf & DP_TEST_CRC_SUPPORTED)) > + return -ENOTTY; > + > + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) > + return -EIO; > + > + hsw_disable_ips(intel_crtc); > > if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK, > - buf | DP_TEST_SINK_START) < 0) { > - ret = -EIO; > - goto out; > + buf | DP_TEST_SINK_START) < 0) { > + hsw_enable_ips(intel_crtc); > + return -EIO; > } > > + return 0; > +} > + > +int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc) > +{ > + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > + struct drm_device *dev = dig_port->base.base.dev; > + struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc); > + u8 buf; > + int test_crc_count; > + int attempts = 6; > + int ret; > + > + ret = intel_dp_sink_crc_start(intel_dp); > + if (ret) > + return ret; > + > if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0) { > ret = -EIO; > goto stop; > @@ -4014,23 +4038,10 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc) > goto stop; > } > > - if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0) { > + if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0) > ret = -EIO; > - goto stop; > - } > - > stop: > - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) { > - DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n"); > - goto out; > - } > - if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK, > - buf & ~DP_TEST_SINK_START) < 0) { > - DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n"); > - goto out; > - } > -out: > - hsw_enable_ips(intel_crtc); > + intel_dp_sink_crc_stop(intel_dp); > return ret; > } > > -- > 2.1.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx