Currently in our kernel we ioremap 8KB of memory for the opregion and it holds a maximum of 6KB sized RAW vbt data. As per the latest opregion spec when the VBT size exceeds 6KB it cant be placed in the mailbox4 of the opregion, so the physical address of the buffer where the Raw VBT is stored will be mentioned in the mailbox3 with the VBT size in the opregion version 2 and above. A non-zero value here is an indication to driver that a valid Raw VBT is stored here and driver should not refer to mailbox4 for getting VBT. This is implemented in one of the patches in this series. link for the opregion spec : https://securewiki.ith.intel.com/pages/viewpage.action?pageId=48147378 (spec is under intel firewall) In the version 3 of the MIPI sequence block, the size field is 4 bytes so that it can support block size of more than 64KB, but the vbt size field in the bdb header is only 2 bytes. Based on the below points this issue can be handled. 1. When the VBT is not present in the mailbox4 then VBT size needs to be read from the mailbox3 and this VBT size field is of 4 bytes which implies that it can be more than 64KB also. 2. If the VBT size is more than 64KB then the VBT size field in the bdb header cant be relied. So its better to consider the vbt size from the mailbox3 when the VBT is not present in mailbox4. Other patches implements the parsing of the new sequence type which are added in the block 53 and adding new wrapper functions for the struct drm_panel_funcs. Deepak M (4): drm/i915: Parsing VBT if size of VBT exceeds 6KB drm/i915: Using the approprite vbt size if vbt is not in mailbox4 of opregion drm/i915: Added the generic gpio sequence support and gpio table drm: Add few more wrapper functions for drm panel Gaurav K Singh (1): drm/i915: Add functions to execute the new sequences from VBT Uma Shankar (1): BXT GPIO support for backlight and panel control Yogesh Mohan Marimuthu (1): drm/i915: GPIO for CHT generic MIPI vkorjani (2): drm/i915: Adding the parsing logic for the i2c element drm/i915: Added support the v3 mipi sequence block drivers/gpu/drm/i915/i915_drv.h | 10 +- drivers/gpu/drm/i915/i915_reg.h | 28 ++ drivers/gpu/drm/i915/intel_bios.c | 181 +++++++--- drivers/gpu/drm/i915/intel_bios.h | 9 + drivers/gpu/drm/i915/intel_dsi.h | 355 +++++++++++++++++++ drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 513 ++++++++++++++++++++++++++-- drivers/gpu/drm/i915/intel_opregion.c | 42 ++- drivers/gpu/drm/i915/intel_sideband.c | 9 +- include/drm/drm_panel.h | 47 +++ 9 files changed, 1119 insertions(+), 75 deletions(-) -- 1.7.9.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
