On Tue, Jul 14, 2015 at 05:47:37PM +0300, Francisco Jerez wrote: > Damien Lespiau <damien.lespiau@xxxxxxxxx> writes: > > > On Fri, Jul 10, 2015 at 08:13:11PM +0300, Francisco Jerez wrote: > >> From: Peter Antoine <peter.antoine@xxxxxxxxx> > >> > >> This change adds the programming of the MOCS registers to the gen 9+ > >> platforms. The set of MOCS configuration entries introduced by this > >> patch is intended to be minimal but sufficient to cover the needs of > >> current userspace - i.e. a good set of defaults. It is expected to be > >> extended in the future to provide further default values or to allow > >> userspace to redefine its private MOCS tables based on its demand for > >> additional caching configurations. In this setup, userspace should > >> only utilize the first N entries, higher entries are reserved for > >> future use. > >> > >> It creates a fixed register set that is programmed across the different > >> engines so that all engines have the same table. This is done as the > >> main RCS context only holds the registers for itself and the shared > >> L3 values. By trying to keep the registers consistent across the > >> different engines it should make the programming for the registers > >> consistent. > >> > >> v2: > >> -'static const' for private data structures and style changes.(Matt Turner) > >> v3: > >> - Make the tables "slightly" more readable. (Damien Lespiau) > >> - Updated tables fix performance regression. > >> v4: > >> - Code formatting. (Chris Wilson) > >> - re-privatised mocs code. (Daniel Vetter) > >> v5: > >> - Changed the name of a function. (Chris Wilson) > >> v6: > >> - re-based > >> - Added Mesa table entry (skylake & broxton) (Francisco Jerez) > >> - Tidied up the readability defines (Francisco Jerez) > >> - NUMBER of entries defines wrong. (Jim Bish) > >> - Added comments to clear up the meaning of the tables (Jim Bish) > >> > >> Signed-off-by: Peter Antoine <peter.antoine@xxxxxxxxx> > >> > >> v7 (Francisco Jerez): > >> - Don't write L3-specific MOCS_ESC/SCC values into the e/LLC control > >> tables. Prefix L3-specific defines consistently with L3_ and > >> e/LLC-specific defines with LE_ to avoid this kind of confusion in > >> the future. > >> - Change L3CC WT define back to RESERVED (matches my hardware > >> documentation and the original patch, probably a misunderstanding > >> of my own previous comment). > >> - Drop Android tables, define new minimal tables more suitable for the > >> open source stack. > >> - Add comment that the MOCS tables are part of the kernel ABI. > >> - Move intel_logical_ring_begin() and _advance() calls one level down > >> (Chris Wilson). > >> - Minor formatting and style fixes. > >> v8 (Francisco Jerez): > >> - Add table size sanity check to emit_mocs_control/l3cc_table() (Chris > >> Wilson). > >> - Add comment about undefined entries being implicitly set to uncached > >> for forwards compatibility. > >> v9 (Francisco Jerez): > >> - Minor style fixes. > > > > What's happening here? are we ready to commit to this ABI? > > I'm for it. I also sent a patch for userspace to switch to the new > tables [1] and already have an R-b on it. > > [1] http://lists.freedesktop.org/archives/mesa-dev/2015-July/088310.html Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
