2015-07-07 20:28 GMT-03:00 Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>: > Idle frames the number of identical frames needed > before panel can enter PSR. > > There are some panels that requires up to minimum of 4 idle > frames available on the market. For these cases usually > VBT should be used to configure the number of idle frames, > but unfortunately this isn't always true and VBT isn't being > set at all. > > Let's trust VBT when it is set + 1 and use minimum of 4 + 1 > when VBT isn't set. "+1" covers the "of-by-one" case. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_psr.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index 8507932..d40d6f4 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -254,10 +254,13 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp) > uint32_t max_sleep_time = 0x1f; > /* Lately it was identified that depending on panel idle frame count > * calculated at HW can be off by 1. So let's use what came > - * from VBT + 1 and at minimum 2 to be on the safe side. > + * from VBT + 1. > + * There are also other cases where panel demands at least 4 > + * but VBT is not being set. To cover these 2 cases lets use > + * at least 5 when VBT isn't set to be on the safest side. > */ > uint32_t idle_frames = dev_priv->vbt.psr.idle_frames ? > - dev_priv->vbt.psr.idle_frames + 1 : 2; > + dev_priv->vbt.psr.idle_frames + 1 : 5; > uint32_t val = 0x0; > const uint32_t link_entry_time = EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES; > > -- > 2.1.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
