2015-07-07 20:28 GMT-03:00 Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>: > By Spec we should only mask memup and hotplug detection > for hardware tracking cases. However we always masked > LPSP because with power well always enabled on audio > PSR was never being activated and residency was always > zeroed. > > Apparently audio driver is tying power well management > and runtime PM for some reason. But with audio runtime > PM working or with audio completely out of picture > we should remove this mask, otherwise we have a high > risk of miss screen updates as faced by Matthew. > > WARNING: With this patch if snd_intel_hda driver is > running and not releasing power well properly PSR will > constant Exit and Performance Counter will be 0. > > But the best thing of this patch is that with one more > HW tracking working the risks of missed blank screen > are minimized at most. > > This affects just core platforms where PSR exit are also > helped by HW tracking: Haswell, Broadwell and Skylake > for now. > > v2: Fix commit message explanation. It has nothing to do > with runtime PM on i915 as previously advertised. > > Cc: Daniel Vetter <daniel.vetter@xxxxxxxx> > Cc: Matthew Garrett <mjg59@xxxxxxxxxxxxx> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_psr.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index dd174ae..8507932 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -400,7 +400,7 @@ void intel_psr_enable(struct intel_dp *intel_dp) > > /* Avoid continuous PSR exit by masking memup and hpd */ > I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP | > - EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); > + EDP_PSR_DEBUG_MASK_HPD); As I mentioned earlier, we'll need IGT fixes for this one. One of the fixes will be to make the PSR tests enable Audio runtime PM - see the last review for pointers. The other fix will be that patch I sent to you on pastebin that fixes the assertions for PSR when we're using 2 pipes - because now 2 pipes will disable PSR. After the IGT fixes are submitted: Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > /* Enable PSR on the panel */ > hsw_psr_enable_sink(intel_dp); > -- > 2.1.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
