>From EDID we can read and request higher pixel clock than our HW can support. This set of patches add checks if requested pixel clock is lower than the one supported by the HW. The requested mode is discarded if we cannot support the requested pixel clock. For example for Cherryview 'cvt 2560 1600 60' gives # 2560x1600 59.99 Hz (CVT 4.10MA) hsync: 99.46 kHz; pclk: 348.50 MHz Modeline "2560x1600_60.00" 348.50 2560 2760 3032 3504 1600 1603 1609 1658 -hsync +vsync where pixel clock 348.50 MHz is higher than the supported 304 MHz. The checks are implemented for DisplayPort, HDMI, LVDS, DVO, SDVO, DSI, CRT, TV, and DP-MST. Mika Kahola (9): drm/i915: Check pixel clock when setting mode for DP drm/i915: Check pixel clock when setting mode for HDMI drm/i915: Check pixel clock when setting mode for LVDS drm/i915: Check pixel clock when setting mode for DVO drm/i915: Check pixel clock when setting mode for SDVO drm/i915: Check pixel clock when setting mode for DSI drm/i915: Check pixel clock when setting mode for CRT drm/i915: Check pixel clock when setting mode for TV drm/i915: Check pixel clock when setting mode for DP-MST drivers/gpu/drm/i915/intel_crt.c | 24 +++++++++++++++++++++++- drivers/gpu/drm/i915/intel_dp.c | 25 ++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_dp_mst.c | 28 ++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_dsi.c | 24 ++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_dvo.c | 21 ++++++++++++++++++++- drivers/gpu/drm/i915/intel_hdmi.c | 28 +++++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_lvds.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/intel_sdvo.c | 21 +++++++++++++++++++++ drivers/gpu/drm/i915/intel_tv.c | 21 +++++++++++++++++++++ 9 files changed, 206 insertions(+), 4 deletions(-) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
