On 23/06/15 13:21, Michel Thierry wrote: > Gen8+ supports 48-bit virtual addresses, but some objects must always be > allocated inside the 32-bit address range. > > In specific, any resource used with flat/heapless (0x00000000-0xfffff000) > General State Heap (GSH) or Intruction State Heap (ISH) must be in a > 32-bit range, because the General State Offset and Instruction State Offset > are limited to 32-bits. > > Provide a flag to set when the 4GB limit is not necessary in a given bo. > 48-bit range will only be used when explicitly requested. > > Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx > Signed-off-by: Michel Thierry <michel.thierry@xxxxxxxxx> > --- > include/drm/i915_drm.h | 3 ++- > intel/intel_bufmgr.c | 12 ++++++++++++ > intel/intel_bufmgr.h | 2 ++ > intel/intel_bufmgr_gem.c | 48 +++++++++++++++++++++++++++++++++++++++++++---- > intel/intel_bufmgr_priv.h | 11 +++++++++++ > 5 files changed, 71 insertions(+), 5 deletions(-) > > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h > index ded43b1..d6fb99d 100644 > --- a/include/drm/i915_drm.h > +++ b/include/drm/i915_drm.h > @@ -680,7 +680,8 @@ struct drm_i915_gem_exec_object2 { > #define EXEC_OBJECT_NEEDS_FENCE (1<<0) > #define EXEC_OBJECT_NEEDS_GTT (1<<1) > #define EXEC_OBJECT_WRITE (1<<2) > -#define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_WRITE<<1) > +#define EXEC_OBJECT_SUPPORTS_48BADDRESS (1<<3) Please change the name, so you don't concatenate the "B" of "48B" with the "A" of "ADDRESS", making something which appears to relate to a "BAD DRESS". .._48B_ADDRESS.. and corresponding lowercase variants would be fine :) .Dave. _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx