On Thu, Jun 18, 2015 at 07:28:26PM +0100, Dave Gordon wrote: > We don't need "coherency" as such. The buffer is filled (once only) by > the CPU (so I should put a set-to-cpu-domain between the allocate and > fill stages?) Once it's filled, the CPU need not read or write it ever > again. > > Then before the DMA engine accesses it, we call i915_gem_obj_ggtt_pin, > which I'm assuming will take care of any coherency issues (making sure > the data written by the CPU is now visible to the DMA engine) when it > puts the buffer into the GTT-readable domain. Is that not sufficient? No. pin just ensures that there is a binding for the object in the appropriate VM and then increments the vma's pin_count to make sure it can not be relinquished until we say so. That is we often do want multiple mappings of an object in different VM, and direct access from the CPU (i.e. in the CPU domain whilst bound to the GPU). To ensure that is ready for access by the GPU, you need to set it to the appropriate domain prior to that access. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
