On Tue, Jun 16, 2015 at 04:39:23PM +0300, Mika Kuoppala wrote: > In order for skl+ hardware to guarantee that no context switch > takes place during reset and that current context is properly > saved, the driver needs to notify and query hw before commencing > with reset. > > We will only proceed with reset if all engines report that they > are ready for reset. > > As we skip the reset if any single engine reports not ready, this > commit prevents system hang skl in some situations where the > gpu/blitter is hanged and in such state that any write to generic > reset register (GEN6_GDRST) causes immediate system hang. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=89959 > References: https://bugs.freedesktop.org/show_bug.cgi?id=90854 > Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > drivers/gpu/drm/i915/intel_uncore.c | 32 +++++++++++++++++++++++++++++++- > 2 files changed, 34 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 0b979ad..3684f92 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1461,6 +1461,9 @@ enum skl_disp_power_wells { > #define RING_MAX_IDLE(base) ((base)+0x54) > #define RING_HWS_PGA(base) ((base)+0x80) > #define RING_HWS_PGA_GEN6(base) ((base)+0x2080) > +#define RING_RESET_CTL(base) ((base)+0xd0) > +#define RESET_CTL_REQUEST_RESET (1 << 0) > +#define RESET_CTL_READY_TO_RESET (1 << 1) > > #define HSW_GTT_CACHE_EN 0x4024 > #define GTT_CACHE_EN_ALL 0xF0007FFF > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index 4a86cf0..404bce2 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -1455,9 +1455,39 @@ static int gen6_do_reset(struct drm_device *dev) > return ret; > } > > +static int wait_for_bits_set(struct drm_i915_private *dev_priv, > + const u32 reg, const u32 mask, const int timeout) Use whitespace to group terms, and probably best to call it with both mask and value for generality. static int wait_for_register(struct drm_i915_private *dev_priv, const u32 reg, const u32 mask, const u32 value, const unsigend long timeout); I hope this proves useful elsewhere, do you have a followup patch? It should reduce the size of our module quite considerably. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
