Max CD clock for Broadwell platform is added to
'intel_mode_max_pixclk()' function. This patch
removes the need for 'ilk_max_pixel_rate()' function.
Signed-off-by: Mika Kahola <mika.kahola@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_display.c | 45 +++++++++++-------------------------
1 file changed, 14 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 953eda7..b178fe9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5879,6 +5879,7 @@ static int intel_mode_max_pixclk(struct drm_device *dev,
struct intel_crtc *intel_crtc;
struct intel_crtc_state *crtc_state;
int max_pixclk = 0;
+ int pixel_rate;
for_each_intel_crtc(dev, intel_crtc) {
if (state)
@@ -5892,8 +5893,16 @@ static int intel_mode_max_pixclk(struct drm_device *dev,
if (!crtc_state->base.enable)
continue;
- max_pixclk = max(max_pixclk,
- crtc_state->base.adjusted_mode.crtc_clock);
+ if (IS_BROADWELL(dev)) {
+ pixel_rate = ilk_pipe_pixel_rate(intel_crtc->config);
+
+ if (intel_crtc->config->ips_enabled)
+ pixel_rate = DIV_ROUND_UP(pixel_rate * 100, 95);
+
+ } else
+ pixel_rate = crtc_state->base.adjusted_mode.crtc_clock;
+
+ max_pixclk = max(max_pixclk, pixel_rate);
}
return max_pixclk;
@@ -9542,32 +9551,6 @@ static void broxton_modeset_global_resources(struct drm_atomic_state *old_state)
broxton_set_cdclk(dev, req_cdclk);
}
-/* compute the max rate for new configuration */
-static int ilk_max_pixel_rate(struct drm_i915_private *dev_priv)
-{
- struct drm_device *dev = dev_priv->dev;
- struct intel_crtc *intel_crtc;
- struct drm_crtc *crtc;
- int max_pixel_rate = 0;
- int pixel_rate;
-
- for_each_crtc(dev, crtc) {
- if (!crtc->state->enable)
- continue;
-
- intel_crtc = to_intel_crtc(crtc);
- pixel_rate = ilk_pipe_pixel_rate(intel_crtc->config);
-
- /* pixel rate mustn't exceed 95% of cdclk with IPS on BDW */
- if (IS_BROADWELL(dev) && intel_crtc->config->ips_enabled)
- pixel_rate = DIV_ROUND_UP(pixel_rate * 100, 95);
-
- max_pixel_rate = max(max_pixel_rate, pixel_rate);
- }
-
- return max_pixel_rate;
-}
-
static void broadwell_set_cdclk(struct drm_device *dev, int cdclk)
{
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -9681,8 +9664,8 @@ static int broadwell_modeset_global_pipes(struct drm_atomic_state *state)
struct drm_i915_private *dev_priv = to_i915(state->dev);
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
- int max_pixclk = ilk_max_pixel_rate(dev_priv);
- int cdclk, i;
+ int max_pixclk = intel_mode_max_pixclk(state->dev, state);
+ int cdclk;
int ret = 0;
if (max_pixclk < 0)
@@ -9723,7 +9706,7 @@ static void broadwell_modeset_global_resources(struct drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
- int max_pixel_rate = ilk_max_pixel_rate(dev_priv);
+ int max_pixel_rate = intel_mode_max_pixclk(state->dev, state);
int req_cdclk = broadwell_calc_cdclk(dev_priv, max_pixel_rate);
if (req_cdclk != dev_priv->cdclk_freq)
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
