On Thu, Jun 11, 2015 at 02:20:22PM +0100, Damien Lespiau wrote: > On Wed, Jun 10, 2015 at 04:16:12PM -0700, Chandra Konduru wrote: > > Delete the duplicate #defines introduced by: > > > > commit 6b457d31ea0465fcadcf6d5044f5f71398954727 > > Author: A.Sunil Kamath <sunil.kamath@xxxxxxxxx> > > Date: Thu Apr 16 14:22:09 2015 +0530 > > > > drm/i915/skl: Implement enable/disable for Display C5 state. > > > > Signed-off-by: Chandra Konduru <chandra.konduru@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_reg.h | 6 ------ > > 1 file changed, 6 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index 40a3a64..741cd32 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -7281,12 +7281,6 @@ enum skl_disp_power_wells { > > #define DC_STATE_EN 0x45504 > > #define DC_STATE_EN_UPTO_DC5 (1<<0) > > #define DC_STATE_EN_DC9 (1<<3) > > - > > -/* > > -* SKL DC > > -*/ > > -#define DC_STATE_EN 0x45504 > > -#define DC_STATE_EN_UPTO_DC5 (1<<0) > > #define DC_STATE_EN_UPTO_DC6 (2<<0) > > #define DC_STATE_EN_UPTO_DC5_DC6_MASK 0x3 > > And now we have DC9 define in the middle of the DC5/6 field. Oh well, > still somewhat better. > > Reviewed-by: Damien Lespiau <damien.lespiau@xxxxxxxxx> Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx