On Fri, 12 Jun 2015, Mika Kahola <mika.kahola@xxxxxxxxx> wrote: > Limit CHV maximum cdclk to 320MHz. > > v2: Rebase to the latest > v3: Clean up of if-else tree > > Signed-off-by: Mika Kahola <mika.kahola@xxxxxxxxx> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> http://mid.gmane.org/20150415191900.GM1237@xxxxxxxxx > --- > drivers/gpu/drm/i915/intel_display.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 5cc2263..c027012 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5256,6 +5256,8 @@ static void intel_update_max_cdclk(struct drm_device *dev) > dev_priv->max_cdclk_freq = 540000; > else > dev_priv->max_cdclk_freq = 675000; > + } else if (IS_CHERRYVIEW(dev)) { > + dev_priv->max_cdclk_freq = 320000; > } else if (IS_VALLEYVIEW(dev)) { > dev_priv->max_cdclk_freq = 400000; > } else { > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
