On Mon, Jun 15, 2015 at 03:05:27PM +0200, Daniel Vetter wrote: > On Mon, Jun 15, 2015 at 12:21:17PM +0000, Kahola, Mika wrote: > > > -----Original Message----- > > > From: Daniel Vetter [mailto:daniel.vetter@xxxxxxxx] On Behalf Of Daniel > > > Vetter > > > Sent: Monday, June 15, 2015 2:55 PM > > > To: Kahola, Mika > > > Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > Subject: Re: [PATCH v6 2/8] drm/i915: Use cached cdclk value > > > > > > On Wed, Jun 03, 2015 at 03:45:08PM +0300, Mika Kahola wrote: > > > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > > > > > Rather than reading out the current cdclk value use the cached value > > > > we have tucked away in dev_priv. > > > > > > > > v2: Rebased to the latest > > > > v3: Rebased to the latest > > > > v4: Fix for patch style problems > > > > > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Signed-off-by: Mika Kahola <mika.kahola@xxxxxxxxx> > > > > > > This patch needs to be extended to also cover the recently added > > > skl_max_scale. Tvrtko has recently written a patch to add some checks to > > > that code too, would be good to resurrect that too. Chandra can help with > > > any questions wrt the skl scaler code. > > > > > > Cheers, Daniel > > Jani has pushed these patches already so maybe this is an item for a separate patch? > > Yeah that's what I've meant with extending. Please work together with > Damien and Chandra and Maarten in figuring out what exactly is needed > here. I think Maarten has it already covered in: [PATCH v3 19/19] drm/i915: Make cdclk part of the atomic state. but I probably should test it :) -- Damien _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
