On Thu, May 28, 2015 at 10:21:16AM -0700, Rodrigo Vivi wrote:
> Without this frontbuffer flip when enabling planes PSR got compromised
> and wasn't being enabled waiting forever on the flush that never
> arrived.
>
> Another solution would to create a enable_cursor function and split this
> frontbuffer flip among the different plane enable and disable functions.
> But if necessary this can be done in a follow up work. For now let's
> just fix the regression.
>
> It was removed by:
>
> commit 87d4300a7dbc19634018e147b4753f3c9bb5f471
> Author: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
> Date: Tue Apr 21 17:12:54 2015 +0300
>
> drm/i915: Move intel_(pre_disable/post_enable)_primary to intel_display.c, and use it there.
>
> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
Queued for -next-fixes, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 067b1de..4e3f302 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4828,11 +4828,22 @@ intel_pre_disable_primary(struct drm_crtc *crtc)
>
> static void intel_crtc_enable_planes(struct drm_crtc *crtc)
> {
> + struct drm_device *dev = crtc->dev;
> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> + int pipe = intel_crtc->pipe;
> +
> intel_enable_primary_hw_plane(crtc->primary, crtc);
> intel_enable_sprite_planes(crtc);
> intel_crtc_update_cursor(crtc, true);
>
> intel_post_enable_primary(crtc);
> +
> + /*
> + * FIXME: Once we grow proper nuclear flip support out of this we need
> + * to compute the mask of flip planes precisely. For the time being
> + * consider this a flip to a NULL plane.
> + */
> + intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_ALL_MASK(pipe));
> }
>
> static void intel_crtc_disable_planes(struct drm_crtc *crtc)
> --
> 2.1.0
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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